IBM Series 1 User Manual page 227

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ll!iliateg
19b.
when designiny the IPL mechanism
for an
1/0
attachment there are several important items that
must
be
taken
into
consideration.
These
items
can be
ca
t{~gorized
int.o two grou ps:
1)
IPL
selection and, 2} syste10
reset.
IPL
selection refers to the ability of
all
IPL device to
be
selected
as either being a primary or alternate loading
device.
Since only two IPL sources are allowed on
the
1/0
channel,
the
processor
selects the appropriate device via
the status bus bits 0 and
1.
The
device
attachment
must
have
the
capability
of being personalized as either being
primary or alternate or
neither.
Refer
to
figure
2-19,
Processor
initiated
1FL
logic.
Note
that
primary
or
alternate selection is provided via jumpers.
The
processor
initiated
IPL
sequence
basically
consists
of two system
resets, the second of
which
performs
a
unique
function.
with
the
activation of the first system reset and initiate
IPL,
d
dc reset occurs resettiny the IPL tag flip-latch
and
deactivating
the
IPl
tag.
When system reset deactivdtes,
the flip latch
is
set and the IPL
tag
is
activated.
But
prior
to
the
flip
latch changing state, due to delays, a
logical zero is clocked into the D-trigger.
Therefore,
IPL
request
and
transfers
are
not
yet
enabled.
The second
system
reset
pulse becomes active but does
not
affect
the
flip
latch
because
the initiate IPL tag is inactive.
The
second system reset
then
deactivates
causing
the
active
value of the IPL tag to be clocked throuyh the trigger, thus
enabling IPL requests and transfers.
Should a third
system
reset occur, the IPL tag and enable IPL latches are reset.
Q~Y'!£g ]i2'§~!..
For most normal applications, the recommended
implementation
to
execute a device reset is to utilize the
entire envelope of address gate
as
a
long
strobe.
This
allows
for
a
greater
length
of
effective reset and for
earlier clearing of logic.
E££~!.'yg.£
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ni .!l..9:.
Receivers
on bidirectional busses
may have to be conditioned, depending
upon
the
technology
utilized.
The
primary
reason for this conditioning is to
reduce loading on the particular bus to the source
that
is
driving
the
bus
at
the
time.
Receiver conditioning by
itself serves no purpose as an enabling or logical function.
Therefore, receiver conditioning is discussed in more detail
in the subsequent section of
this
chapter
on
"Electrical
Chacacteristics",
specifically
in
IlUnit
Load
Characteristics".
2-52
GAJ4-0033
I
'

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