Analog Devices ADP1974-EVALZ User Manual page 6

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UG-883
Figure 11 shows the relationship between the R
and the programmed switching frequency.
210
190
170
150
130
110
90
70
50
30
50
100
150
Figure 11. R
FREQ (MASTER)
To calculate the R
FREQ (MASTER)
synchronization frequency, use the following equation:
( )
=
R
FREQ
(
MASTER
)
f
SET
where:
R
is the resistor in kΩ to set the frequency for master
FREQ (MASTER)
devices.
f
is the switching frequency in kHz.
SET
Selecting R
for a Slave Device
FREQ
To configure the
ADP1974
as a slave device, drive V
When functioning as a slave device, the
the frequency of the external clock applied to the SYNC pin. To
ensure proper synchronization, select R
to a value slightly slower than that of the master clock by using
the following equation:
R
= 1.11 × R
FREQ (SLAVE)
FREQ (MASTER)
where:
R
is the resistor value that appropriately scales the
FREQ (SLAVE)
frequency for the slave device, and 1.11 is the R
master ratio for synchronization.
R
is the resistor value that corresponds to the
FREQ (MASTER)
frequency of the master clock applied to the SYNC pin.
The frequency of the slave device is set to a frequency slightly
lower than that of the master device to allow the digital
synchronization loop of the
master clock period. The slave device can synchronize to a
master clock frequency running between 2% to 20% higher
than the slave clock frequency. Setting R
than R
runs the synchronization loop in approximately
FREQ (MASTER)
the center of the adjustment range.
Phase Shift Resistor (R
SCFG
If a phase shift from SYNC to DH and DL is desired, select R
for the desired time delay using Figure 12 as reference.
FREQ (MASTER)
200
250
300
f
(kHz)
SET
vs. Switching Frequency (f
)
SET
value for a desired master clock
4
10
(kHz)
< 4.53 V.
SCFG
ADP1974
operates at
to set the frequency
FREQ
slave to
FREQ
ADP1974
to synchronize to the
to 1.11× larger
FREQ (SLAVE)
)
value
450
400
350
300
250
200
150
100
50
0
0
Programming the Dead Time (R
To adjust the dead time on the synchronous DH and DL
outputs, connect a resistor (R
with a 47 pF capacitor. Select R
Figure 13 or calculate R
reach a single equation for R
(1)
and R
.
DT
( )
V
V
DT
V
=
R
DT
I
where:
V
is the DT pin programming voltage.
DT
I
is 20 µA, typical internal current source.
DT
t
is the desired dead time in ns.
DEAD
R
is the resistor value in kΩ for the desired dead time.
DT
To calculate R
( )
(2)
R
DT
175
150
125
100
75
50
25
0
0
Figure 13. DT Pin Resistance (R
SCFG
Rev. 0 | Page 6 of 12
ADP1974-EVALZ User Guide
1.5
3.0
4.5
t
(µs)
DELAY
Figure 12. R
vs. Phase Delay, R
SCFG
FREQ
)
DT
) from DT to GND and bypass
DT
for a given dead time using
DT
using the following equations. To
DT
, combine the equations for V
DT
(
)
( )
×
I
t
ns
28.51
=
DT
DEAD
3.76
DT
DT
for a given t
, the resulting equation used is
DT
DEAD
( )
t
ns
28.51
=
DEAD
3.76
100
200
300
400
t
(ns)
DEAD
) vs. Dead Time (t
DT
6.0
7.5
= 100 kΩ
DT
(3)
(4)
(5)
500
600
700
)
DEAD

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