Table A.1: Watchdog Timer Registers - Advantech GMB-945GC User Manual

Table A.1: Watchdog Timer Registers

Index value in
EFIR (2Eh)
87h
07h
30h
F5h
F6h
F7h
AAh
Note! EFIR stands for Extended Function Index Register in Super I/O control-
ler while EFDR stands for Extended Function Data Register. They coin-
cide to each other so as to read and write the Data to its corresponding
Index in Super I/O controller.
GMB-945GC User Manual
Data value in EFDR Description
(2Fh)
----- Write 87h to I/O address port 2Eh twice to unlock
the Super I/O controller.
08h Write 08h to select watchdog timer at EFIR 07h.
01h Write 01h to enable the function of the watchdog
timer. Disabled is set as default.
Counting unit Set seconds or minutes as units for the timer.
EFDR bit 3:
Write 0 to set second as counting unit.
Write 1 to set minutes as counting unit. [default]
Counts 0: stop timer [default]
01~FF (hex): The amount of the count, in seconds
or minutes, depends on the value set in register
F5h. This number decides how long the watchdog
timer waits for strobe before generating an interrupt
or reset signal. Writing a new value to this register
can reset the timer to count with the new value.
WDT enabling/dis- EFDR Bit 7:
abling and status Write 1 to enable mouse to reset the timer
monitoring Write 0 to disable[default].
EFDR Bit 6:
Write 1 to enable keyboard to reset the timer
Write 0 to disable[default].
EFDR Bit 5:
Write 1 to generate a timeout signal immediately
and automatically return to 0. [default=0]
EFDR Bit 4: Read status of watchdog timer, 1
means timer is "timeout".
----- Write AAh to I/O address port 2Eh to lock the Super
I/O controller.
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