Control Data Corporation INFORMATION SYSTEMS TERMINAL II Hardware Maintenance Manual page 79

generated when both the enable and the character
request condition are true simultaneously (character
request means the transmitter can accept one charac-
ter of data to send).
. • Data Bus Line 1 (Enable CRDY Interrupt) - The
character-ready interrupt is enabled if this line is
a 1 and disabled if it is a O. An interrupt is
generated when both the enable and the character-
ready condition are true simultaneously (character-
ready means the receiver has received a full
character and the processor can take it). It does
not mean that the character has no errors in it.
The software should check the status word to verify
the quality of the data.
• Data Bus Lines 2 and 3 (Select Word Length) - These
2 bits select how many Data bits are transmitted in
each serial character or expected in each serial
character received. Table 4-3 shows how the selec-
tion is performed.
TABLE 4-3. SERIAL CHANNEL WORD LENGTH SELECTION
DATA DATA NUMBER OF
LINE 3 LINE 2 DATA BITS
0 0
5
0 1
6
1 0
7
1 1
8
• Data Bus Line 4 (Even/Odd Parity) - This line high
conditions the module to generate and check for an
even Parity bit. This line on low conditions the
module to generate and check for an odd Parity bit.
This circuit is disabled if parity is inhibited.
Even parity means that the number of logical Is in
the data is even, while odd parity means that the
number of logical Is in the data is odd. The Start
and Stop bits are excluded in the calculation.
• Data Bus Lines 5, 6, and 7 (Baud Rate Select) - The
module generates some of the commonly used baud
rates. Their selection is performed by these 3 bits
shown in table 4-4.
82100083
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