TABLE 4-8.
MISCELLANEOUS CONTROL
Data Bit
Control Feature
0
1
=
Sound alarm
0
=
No operation
1
0
=
DTR ON
1
=
DTR OFF
2
0
=
Reset flag
1
=
Set flag
•
Data Bit 0, Alarm - The output function with bit 0
set to 1 triggers an 80-millisecond audible tone.
If bit 0 is not set, the alarm does not sound.
The
alarm timer is retriggerable; therefore, the pro-
grammer can repeat this output function and keep the
alarm sounding.
The alarm keeps sounding for 100
milliseconds after the last function is received.
•
Data Bit 1,' Programmable DTR - The processor has
control of the DTR signal.
It is forced to the ON
state by power on or the RESET switch, and then it
can be software controlled.
Data Bit 1 set to 0
turns the signal on and Data Bit 1 set to 1 turns it
off.
•
Data Bit 2, Hardware Flag - This bit controls the
state of a flip-flop that can be read by the proces-
sor.
A 1 sets the flip-flop and a 0 clears it.
A unique feature of this flip-flop is that it comes
up set upon power on, but it is not modified by the
RESET switch.
These two conditions force the pro-
cessor to start executing at address 0000, this
flip-flop can inform the processor as to which of
the conditions actually occurred.
(The program
should check the state and reset it immediately.)
•
Data Bits 3 through 7 (Not assigned) - These five
bits are ignored by the terminal.
Read Serial Status (Input 06) - This function transfers
status information from the serial channel interface to the
processor.
4-40
82100083
Need help?
Do you have a question about the INFORMATION SYSTEMS TERMINAL II and is the answer not in the manual?