Load Interrupt Mask (Output 04) - This function transfers 8
bits of data from the processor to the Interrupt Mask
register, whose outputs control the interrupt traffic to
the processor.
Each of the eight interrupt levels of the
terminal has an associated bit in the Mask register.
If
the bit in the mask is a 1, the incoming interrupt is
allowed to pass and reach the processor, otherwise it is
blocked off.
Each interrupt level that reaches the processor generates
an interrupt vector uniquely defining its level (interrupt
trap address).
If more than one interrupt level is active
at the same time, the hardware blocks all except the one
that has the highest priority.
Table 4-7 shows the data
bit assignments, priorities, interrupt sources, and inter-
rupt vectors.
TABLE 4-7.
INTERRUPT DESCRIPTION
PRIORITY
SOURCE
0*
Serial channel
1
Communication line
ready
2
Communication line
request
3
Keyboard data ready
4
Touchpanel data ready
5
Short interval
6
External interrupt
7**
Long interval
*Highest order bit.
**Lowest order bit.
The interrupt sources are:
INTERRUPT MASK
(DATA BIT)
o
7
4
6
5
1
3
2
INTERRUPT VECTOR
(HEX CODE)
00
02
04
06
08
OA
OC
OE
•
Serial Channel - Either character request or charac-
ter ready.
•
Communication Line Ready - The PLATO receiver has a
byte ready to be transferred to the processor.
•
Communication Line Request - The PLATO transmitter
is inactive and can accept data from the processor.
4-38
82100083
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