Table of Contents
Advertisement
{3} 9 x 7, 64-Character Set and 5 x 7, 64-Character Set - ME2,
ME8 and ME4.
{4} 9 x 7, 96-Character set - ME2, ME8, ME4 and MEIO.
Each ROM (Character Generator) element has three inputs (in addi-
tion to the input voltages):
{I} The modified character code - Outputs TBl-TB5 from the shift
register are buffered and applied to five of the six character
inputs to all ROMls.
For the ROMls in element locations
ME2 and ME8, the sixth character code input is controlled by
TB6.
For the ROMls in locations ME4 and MElO, the sixth char-
acter code input is controlled by CHADD7. By jumper option,
CHADD7 can be TB6 or TB7.
(2) Column Address - Timing outputs DCWl-DCW5 from LSI chip ME16,
specify the five "full-step" columns in each 5 x 7 or
9
x 7
character matrix in ROMls ME2 and ME7. Timing output DCWOl-
DCW04 specify the four "half-step" columns in each 9 x 7 matrix
in ROMls ME8 and MEIO.
{3}
Timing - A low input to pin 28 of each ROM gates the 7-bit
dot configuration of the addressed character and column to
the output of that ROM.
For the .full-step ROMls (ME2 and ME4),
this timing input is STROBE ANDed with ROMTB8 or ROMTB8.
By
jumper option, ROMTB8 can be ±OV, +5V, TB7, TB8 or TB8, allowing
the selected one of these inputs to enable the ROM. The STROBE
pulse provides the timing input for gating the 7-bit dot pattern
to the print head solenoids.
For the half-step ROMls (ME8 and MElD), the timing input is
ROME2 ANDed with ROMTB8 or ROMTB8.
For normal character print-
ing, ROME2 generated by LSI chip ME16, is coincident with De-
layed Strobe signal DLYSTB. This effectively interleaves the
dot pattern from the half-step ROMls with the dot pattern from
the full-step ROMls.
4-19
Advertisement
Table of Contents
