OLIMEX OLinuXino-MAXI User Manual page 17

OLIMEX© 2012
— Provides full path from color-space conversion, scaling, alpha-blending to rotation
without intermediate memory access
— Bi-linear scaling algorithm with cropping and letterboxing
— Alpha-blend, BITBLT, color-keying
— Memory efficient block-based rotation engine
— Supports up to eight overlays
 Integrated TV-Out Support
— Integrated PAL/NTSC TV-encoder fully pipelined to display controller's D1 resolution
output stream
— Integrated low-power 10-bit Video DAC (VDAC) for composite analog video output.
 Data Co-Processor (DCP)
— AES 128-bit encryption/decryption
— SHA-1 hashing
— High-speed memory copy
 Three Universal Asynchronous Receiver-Transmitters (UARTs)
— Two high-speed application UARTs operating up to 3.25 Mb/s with hardware flow
control and dual DMA.
— Debug UART operates at up to 115Kb/s using programmed I/O.
 I2C Master/Slave
— DMA control of an entire EEPROM or other device read/write transaction without CPU
intervention
 Dual Synchronous Serial Ports (for SPI, MMC, SDIO, Triflash)
— Up to 52MHz external SSP clock for all modes, including SPI
— 1-bit, 4-bit and 8-bit MMC/SD/SDIO modes
— Compliant with SDIO Rev. 2.0
— SPI with single, dual and quad modes.
 Four-Channel 16-Bit Timer with Rotary Decoder
 Five-Channel Pulse Width Modulator (PWM)
 Real-Time Clock
— Alarm clock can turn the system on.
— Uses the existing 24-MHz XTAL for low cost or optional low power crystal (32.768 kHz
or 32.0 kHz), customer-selectable via OTP.
 SPDIF Transmitter
 Dual Serial Audio Interface (SAIF), Three Stereo Pairs
— Full-duplex stereo transmit and stereo receive operations
— Cell phone baseband processor connection and external ADCs and DACs
— Bluetooth hands-free connection
— Analog I/O for peripheral bus breakouts
Page 17 of 48
OLinuXino User's Manual