Chapter 3 Functional Details; Pci-Dio24/Lp Block Diagram - Measurement Computing PCI-DIO24/LP User Manual

Functional Details
The PCI-DIO24/LP board features the following:

82C55 digital I/O chip interfaced to the PCI bus. The I/O pins of an 82C55 are bi-directional CMOS TTL
level.

24-bits of digital I/O

68-pin I/O connector
The 82C55 provides the 24-bit digital I/O channels into three eight-bit ports labeled
Port C is further divided into two four-bit ports—PORTCL and PORTCH. You can program each port for input
or output.

PCI-DIO24/LP block diagram

PCI-DIO24/LP functions are illustrated in the block diagram shown here.
IRQ_ENABLE
IRQ_INPUT
PORT A (7:0)
PORT B (7:0)
PORT CH (3:0)
PORT CL (3:0)
+5V
For more information on digital signal connections
For general information about digital signal connections and digital I/O techniques, refer to the Guide to Signal
Connections (available on our web site at www.mccdaq.com/signals/signals.pdf).
Caution! Do not connect high current/voltage devices directly to the PCI-DIO24/LP or you may damage the
board.
82C55
PORT A CONTROL
BUS
PORT B
PORT CH
PORT CL
Boot
EEPROM
PCI BUS (5V/3.3V, Universal 32-Bit, 33MHz)
Figure 2. PCI-DIO24/LP functional block diagram
CONTROLLER FPGA and LOGIC
Control
Registers
Interrupt
Decode/Status
Control
Bus
Timing
LOCAL BUS
BADR1
PCI
BADR2
CONTROLLER
Interrupt
11
Chapter 3
, and
Port A Port B Port C
IRQ_INPUT
IRQ_ENABLE
.