Power Supply Circuits - Icom ID-RP2 Service Manual

RECEIVE SIGNAL (MAIN-R UNIT)
The receive 1st LO signal from the RX switch (D711) is ap-
plied to the 1st mixer circuit (IC71).
TRANSMIT SIGNAL (MAIN-T UNIT)
The transmit signal from the TX switch (D710) is applied to
the 1st mixer circuit (IC960).
4-3-3 2ND PLL CIRCUIT (MAIN-R/MAIN-T UNITS)
The 2nd PLL circuit oscillates the 2nd LO frequency, and
the signal is applied to the 2nd mixer circuit and quadrature
modulator.
The signal oscillated at the 2nd VCO circuit (Q631, D630) is
amplifi ed at the buffer amplifi ers (Q632, Q633) via low-pass
filter (L631, C653, C654) and then applied to the PLL IC
(IC550, pin 19). The applied signal is divided at the prescaler
and programmable counter section by the N-data ratio from
the CPU (LOGIC-R/LOGIC-T units; IC50). The divided signal
is detected on phase at the phase detector using the refer-
ence frequency (X400: 15.3 MHz) and output from pin 13
(IC550).
The detected signal is passed through the loop fi lter (R555–
R557, C564, C567) and then applied to the 2nd VCO circuit.
The oscillated signal at the 2nd VCO is amplifi ed at the buffer
amplifi ers (Q632 Q771) and is then applied to the RX switch
(MAIN-R unit; D771), and TX switch (MAIN-T unit; D770).
RECEIVE SIGNAL (MAIN-R UNIT)
The receive 2nd LO signal from the RX switch (D771) is ap-
plied to the 2nd mixer circuit (Q131).
• PLL CIRCUITS
IC551
Mode
switch
Loop
filter
Loop
filter
Buffer
Q400
Q632
2nd VCO
Buffer
Q631, D630
IC550
LPF
PLL IC
1st VCO
Buffer
Q473
Q471, Q472,
D471
IC400
Q474
Buffer
PLL IC
15.3 MHz
TRANSMIT SIGNAL (MAIN-T UNIT)
The transmit signal from the TX switch (D770) is applied to
the quadrature modulator (IC890).

4-4 POWER SUPPLY CIRCUITS

4-4-1 LOGIC-R/LOGIC-T UNITS VOLTAGE LINE
Line
Common 5 V controlled by the +5 V regula-
tor circuit (IC500, Q500, Q501) using the
5V "PWRS" signal from the CPU (IC50, pin
101). The output voltage is applied to the
baseband filters (IC300–302), etc.
Common 3.3 V converted from the 5V line
by the 3.3V regulator circuit (IC502). The output
3.3V
voltage is applied to the FPGA IC (IC200) and
buffer amplifier (IC901), etc.
Common 3.3 V converted from the 5V line
by the 3.3V regulator circuit (IC504). The output
3.3V
voltage is applied to the CPU (IC50) and A/D
converter (IC55), etc.
Q771
Buffer
D770
Buffer
Q633
D771
2ND PLL CIRCUIT
1ST PLL CIRCUIT
Q710
Buffer
D710
D711
X400
E - 4 - 4
Description
to quadrature modulator
MAIN-T unit only
to 2nd mixer circuit
MAIN-R unit only
to 1st mixer circuit
MAIN-T unit only
to 1st mixer circuit
MAIN-R unit only