Basler Camera User Manual page 66

Physical Interface
Camera
Input Buffer
FPGA Input
Fig. 34: Direct-coupled GPIO Line Schematic with the GPIO Line Set as an Input and with a Typical External Circuit
Using a Logic Gate (Illustration for Pin 1 as an Example; Simplified)
Camera
Input Buffer
FPGA Input
Fig. 35: Direct-coupled GPIO Line Schematic with the GPIO Line Set as an Input and with a Typical External Circuit
(Illustration for Pin 1 as an Example; Simplified)
For more information about GPIO pin assignments and pin numbering, see Section 5.2.1 on
page 46.
For more information about setting the GPIO line operation, see Section 5.11 on
Section 5.12 on page 69.
56
+3.3 VDC
(Typical)
+3.3 VDC
(Typical)
6-pin
Logic Gate
Receptacle
1
6
3
4
Your
Gnd
2
5
+3.3 V ... +5.0 V
6-pin
Receptacle
1
6
3
4
2
Your
5
Gnd
page 65
AW00123402000
and
Basler ace USB 3.0