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Chapter 4 BIOS Setup
DRAM Timing by SPD When this item Enabled, DRAM Timing is set by SPD
SPD (Serial Presence Detect) is located on the
memory modules, BIOS reads information coded in
SPD during system boot up.
DRAM Clock The value represents the performance parameters
of the installed memory chips (DRAM). Do not
change the value from the factory setting unless you
install new memory that has a different performance
rating .
SDRAM Cycle Length
Select CAS latency time in HCLKs of 2 or 3. The
Time
system designer already set the values. Do not
change the values from the default value unless you
change specifications of the installed DRAM or the
installed CPU.
Bank Interleave The choices: Disabled; 2 Bank; 4 Bank.
DRAM Drive Strength Leave this item with Auto mode.
The choices: Auto; Manual.
DRAM Drive Value When "DRAM Drive Strength" is set to "Auto", this
item will be unable to be selected. We don't
recommend user to adjust this item.
Memory Hole In order to improve performance, certain space in
memory is reserved for ISA cards. This memory must
be mapped into the memory space below 16MB.
The choices: 15M-16M; Disabled.
PCI Master Pipeline
Use default setting.
Req
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