Ioc81/Wdtcr (Wdt Control Register); Ioc91/Cnt12Cr (Counters 1, 2 Control Register) - IBM MiEM78P468L Product Specification

EM78P468N/EM78P468L
8-Bit Microcontroller

6.2.15 IOC81/WDTCR (WDT Control Register)

(Address: 08h, Bit 0 of R5 = "1")
Bit 7
−
Bits 7 ~ 4: Not used
Bit 3 (WDTE): Watchdog timer enable. This control bit is used to enable the Watchdog
timer,
WDTE = "0": Disable WDT function
WDTE = "1": enable WDT function
Bits 2 ~ 0 (WDTP2 ~ WDTP0) : Watchdog Timer prescaler bits. The WDT clock source
is sub-oscillation frequency.

6.2.16 IOC91/CNT12CR (Counters 1, 2 Control Register)

(Address: 09h, Bit 0 of R5 = "1")
Bit 7
CNT2S
Bit 7(CNT2S): Counter 2 clock source select 0/1 → Fs/ Fm*
(*Fs: sub-oscillator clock, Fm: main-oscillator clock)
Bits 6~4 (CNT2P2 ~ CNT2P 0): Counter 2 prescaler select bits
CNT2P2
20 •
Bit 6 Bit 5
− −
WDTP2 WDTP1
0
0
0
0
1
1
1
1
Bit 6 Bit 5
CNT2P2 CNT2P1
CNT2P1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
Bit 4 Bit 3
−
WDTE
WDTP0
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
Bit 4 Bit 3
CNT2P0 CNT1S
CNT1P0
0
1
0
1
0
1
0
1
Product Specification (V1.5) 02.15.2007
(This specification is subject to change without further notice)
Bit 2 Bit 1 Bit 0
WDTP2 WDTP1 WDTP0
WDT Rate
1:1
1:2
1:4
1:8
1:16
1:32
1:64
1:128
Bit 2 Bit 1 Bit 0
CNT1P2 CNT1P1 CNT1P0
Counter 2 Scale
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256