Ra/Lcd_Addr (Lcd Address); Rb/Lcd_Db (Lcd Data Buffer) - IBM MiEM78P468L Product Specification

EM78P468N/EM78P468L
8-Bit Microcontroller
When the LCD function is disabled, all common/segment output is set to ground (GND)
level
Bit 3: Not used
Bit 2 (LCDTYPE): LCD drive waveform type select bit
LCDTYPE = "0": " A" type waveform
LCDTYPE = "1": " B" type waveform
Bits 1 ~ 0 (LCDF1 ~ LCDF0): LCD frame frequency control bits
LCDF1
0
0
1
1
Note: Fs: sub-oscillator frequency

6.9.2 RA/LCD_ADDR (LCD Address)

Bit 7
0
Bits 7 ~ 5: Not used, fixed to "0"
Bits 4 ~ 0 (LCDA4 ~ LCDA0): LCD RAM address
RA
(LCD Address) Bits 7 ~4
00H
01H
02H
1DH
1EH
1FH
Common

6.9.3 RB/LCD_DB (LCD Data Buffer)

Bit 7
−
Bits 7 ~ 4: Not used
Bit 3 ~ 0 (LCD_D3 ~ LCD_D0): LCD RAM data transfer registers
36 •
LCDF0
1/2 Duty
0
Fs/(256×2)=64.0
1
Fs/(280×2)=58.5
0
Fs/(304×2)=53.9
1
Fs/(232×2)=70.6
Bit 6 Bit 5
0 0
Bit 3
(LCD_D3)
−
−
−
|
−
−
−
X COM3
Bit 6 Bit 5
− −
LCD Frame Frequency (e.g. Fs=32.768kHz)
1/3 Duty
Fs/(172×3)=63.5
Fs/(188×3)=58.0
Fs/(204×3)=53.5
Fs/(156×3)=70.0
Bit 4 Bit 3
LCD_A4 LCD_A3
RB (LCD Data Buffer)
Bit 2 Bit 1
(LCD_D2) (LCD_D1)
− − −
− − −
− − −
|
− − −
− − −
− − −
COM2 COM1
Bit 4 Bit 3
−
LCD_D 3
Product Specification (V1.5) 02.15.2007
(This specification is subject to change without further notice)
1/4 Duty
Fs/(128×4)=64.0
Fs/(140×4)=58.5
Fs/(152×4)=53.9
Fs/(116×4)=70.6
Bit 2 Bit 1
LCD_A2 LCD_A1 LCD_A0
Segment
Bit 0
(LCD_D0)
−
SEG0
−
SEG1
−
SEG2
−
SEG29
−
SEG30
−
SEG31
COM0
Bit 2 Bit 1
LCD_D 2 LCD_D 1 LCD_D 0
Bit 0
|
Bit 0