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The LP38798EVM evaluation board is designed to demonstrate the capabilities of the LP38798SD-ADJ
high performance LDO voltage regulator. It is intended to provide a flexible circuit configurations and
access to points of interest. The circuit schematic is shown in
1
Introduction
2
Operating Range
3
Evaluation Board Start-Up
4
Setting the Output Voltage
5
Schematic for LP38798EVAL
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LP38798EVM Schematic
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LP38798SD-ADJ (12-lead WSON) Connection Diagram
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Top Layer as Viewed from Top
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Copper Layer 1 (Top Layer) as Viewed from Top
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Copper Layer 2 (Mid-Layer 1) as Viewed from Top
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Copper Layer 3 (Mid-Layer 2) as Viewed from Top
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Copper Layer 4 (Bottom Layer) as Viewed from Top
1
Bill of Materials for LP38798EVAL
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SNOA914 – March 2013
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Copyright © 2013, Texas Instruments Incorporated
LP38798EVM User's Guide
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User's Guide
SNOA914 – March 2013
LP38798EVM User's Guide
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Summary of Contents for Texas Instruments LP38798EVM

  • Page 1 SNOA914 – March 2013 LP38798EVM User's Guide The LP38798EVM evaluation board is designed to demonstrate the capabilities of the LP38798SD-ADJ high performance LDO voltage regulator. It is intended to provide a flexible circuit configurations and access to points of interest. The circuit schematic is shown in...
  • Page 2: Operating Range

    (CLAMP) Setting the Output Voltage The LP38798EVM board is assembled with R1= 47.5 kΩ and R2= 15.0 kΩ, to set the output voltage to 5.00V. Resistors R1 and R2 may be replaced, as needed, to achieve the desired output voltage as long as the value for R2 is no less than 12.9 kΩ...
  • Page 3: Lp38798Sd-Adj (12-Lead Wson) Connection Diagram

    Exposed Pad on IN (CP) OUT (FB) Bottom (DAP) GND (CP) Figure 2. LP38798SD-ADJ (12-lead WSON) Connection Diagram Figure 3. Top Layer as Viewed from Top SNOA914 – March 2013 LP38798EVM User's Guide Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
  • Page 4: Setting The Output Voltage

    GND 3 Figure 4. Copper Layer 1 (Top Layer) as Viewed from Top Figure 5. Copper Layer 2 (Mid-Layer 1) as Viewed from Top LP38798EVM User's Guide SNOA914 – March 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
  • Page 5: Schematic For Lp38798Eval

    Figure 6. Copper Layer 3 (Mid-Layer 2) as Viewed from Top Figure 7. Copper Layer 4 (Bottom Layer) as Viewed from Top Schematic for LP38798EVAL IN(CP) OUT(FB) LP38798SD-ADJ GND(CP) SNOA914 – March 2013 LP38798EVM User's Guide Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
  • Page 6 TP1, TP2 Keystone Electronics 5000 5000K-ND Test Point, Miniature TP3, TP4 Keystone Electronics 5001 5001K-ND BLACK Test Point, Miniature Keystone Electronics 5002 5002K-ND WHITE LP38798EVM User's Guide SNOA914 – March 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
  • Page 7 Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization.
  • Page 8 FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
  • Page 9 Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan. Texas Instruments Japan Limited (address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan http://www.tij.co.jp...
  • Page 10 FDA Class III or similar classification, then you must specifically notify TI of such intent and enter into a separate Assurance and Indemnity Agreement. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2012, Texas Instruments Incorporated...
  • Page 11: Important Notice

    IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.

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