Backplane (Fabric); Crossbar Chip - Xbc; Switch Fabrics - HP A9834-9001B User's & Service Manual

Overview

Backplane (Fabric)

Backplane (Fabric)
The system backplane assembly provides the following functionality in an sx2000 system:
- Interfaces the CLU subsystem to the system backplane and cell modules
- Houses the system crossbar switch fabrics and cell modules
- Provides switch fabric interconnect between multiple cabinets
- Generates system clock sources
- Performs redundant system clock source switching
- Distributes the system clock to crossbar chips and cell modules
- Distributes housekeeping power to cell modules
- Terminates I/O cables to cell modules
The backplane supports up to eight cells, interconnected via the crossbar links. A sustained total bandwidth
of 25.5 GBs is provided to each cell. Each cell connects to three individual XBC ASICs. This connection
enables a single chip crossing when a cell communicates with another cell in its four-cell group. When
transfering data between cells in different groups, two crossbar links are provided to compensate for the
resultant multiple chip crossings. This topology also provides for switch fabric redundancy
Dual rack/backplane systems contain two identical backplanes. These backplanes use 12 high-speed interface
cables as interconnects instead of the flex cable interface previously employed for the legacy Superdome
crossbar. The sustainable bisection bandwidth between cabinets is 72 GBs at a link speed of 2.1 GT/s.

Crossbar Chip - XBC

The crossbar fabrics in the sx2000 are implemented using the XBC crossbar chip. Each XBC is a
non-bit-sliced, eight-port non-blocking crossbar that can communicate with the CC or XBC ASICs. Each of the
eight ports is full duplex, capable of transmitting and receiving independent packets simultaneously. Each
port consists of 20 channels of IBMs HSS technology. Eighteen channels are used for packet data. One for
horizontal link parity, and one channel as a spare. The HSS channels can run from 2.0- 3.2 GT/s. At 3.0 GT/s,
each port provides 8.5 GBs of sustainable bi-directional data bandwidth.
Like the CC and the SBA, XBC implements link-level retry to recover from intermittent link errors. XBC can
also replace a hard-failed channel with the spare channel during the retry process, which guarantees
continued reliable operation in the event of a broken channel plus single or multibit intermittent errors.
XBC supports enhanced security between hard partitions by providing write protection on key CSRs. Without
protection, CSRs such as the routing tables could be modified by a "rogue" OS, causing other hard partitions
in the system to crash. To prevent this, key CSRs in XBC can only be modified by packets having the "Secure"
bit set. This bit is set by the CC based on a register that is set only by a hard cell reset, which causes secure
firmware to be entered. This bit is cleared by secure firmware before passing control to an OS.

Switch Fabrics

The system backplane houses the switch fabric that connects to each of the cell modules. The crossbar switch
is implemented by a three-link-per-cell topology: three independent switch fabrics connected in parallel. This
topology provides switch fabric redundancy in the crossbar switch. The backplane crossbar can be extended to
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Chapter 1