Chipset Features Setup - TMC TI5VG User Manual

6.5 Chipset Features Setup

This Setup menu controls the configuration of the motherboard chipset.
Bank 0/1 DRAM Timing
Bank 2/3 DRAM Timing
Bank 4/5 DRAM Timing
SDRAM Cycle Length
SDRAM Bank Interleave
DRAM Read Pipeline
Sustained 3T Write
Cache Rd+CPU Wt Pipeline
Read Around write
Cache Timing
Video BIOS Cacheable
System BIOS Cacheable
Memory Hole At 15MB
AGP
Aperture Size
AGP-2X Mode
Bank DRAM Timing
These fields defines the speed of the DRAM memory onboard. The
options are Normal, Medium, Fast, Turbo, 70ns and 60ns. By default,
this fields are set to Normal.
DRAM Cycle Length
This field sets the length of the SDRAM cycle. The options are 2 and 3.
By default, this field is set to 2.
DRAM Bank Interleave
This field sets the SDRAM banks in which the data is interleaved. The
options are Disabled, 2 Bank and 4 Bank. By default, this field is set 2
Bank.
DRAM Read Pipeline
When enabled, this field supports pipelining of DRAM reads The default
setting is Enabled.
Sustained 3T Write
This field allows support for PBSRAM sustained 3T write. By default,
this field is set Enabled.
TI5VG Pentium VP3 ATX Motherboard User's Manual
Chapter 6 BIOS Configuration
ROM PCI/ISA BIOS
CHIPSET FEATURES SETUP
AWARD SOFTWARE INC.
: Normal OnChip USB
: Normal
: Normal
2 CPU Warning Temperature
2 Bank Current CPU Temperature
: Enabled Current System Temperature
: Enabled Current CPUFAN1 Speed
: Enabled Current CPUFAN2 Speed
: Enabled
: Fast
: Enabled
: Disabled IN2 (V) : 1.02V
: Disabled IN4 (V) : 10.50V
: Enabled IN6 (V)) : - 3.10V
: 64M
: Disabled
ESC : Quit
F1 : Help
F5 : Old Values
F6 : Load BIOS Defaults
F7 : Load Setup Defaults
: Disabled
: Disabled
: 38°C/ 100°F
: 0°C/ 32°F
: 4927 RPM
: 4963 RPM
IN1 (V) : 0.25V
IN3(V) : 6.54V
IN5 (V) : - 1.89V
: Select Item
PU/PD/+/- : Modify
(Shift) F2 : Color
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