Gigabit Ethernet Macs; Sram - Motorola MVME6100 Installation And Use Manual

The maximum PCI-X frequency of 100 MHz supported by PCI bus 1 may
be reduced depending on the number and/or type of PMC/PrPMC
installed. If PCI bus 1 is set to +5V VIO, it runs at 33 MHz. VIO is set by
the keying pins (they are both a keying pin and jumper). Both pins must be
set for the same VIO on the PCI-X bus.
PCI bus 0 is connected to the Tsi148 device and PMCspan bridge. PCI bus
0 is configured for 133 MHz PCI-X mode.
The MV64360 PCI interfaces are fully PCI rev. 2.2 and PCI-X rev 1.0
compliant and support both address and data parity checking. The
MV64360 contains all of the required PCI configuration registers. All
internal registers, including the PCI configuration registers, are accessible
from the CPU bus or the PCI buses.

Gigabit Ethernet MACs

The MVME6100 supports two 10/100/1000Mb/s full duplex Ethernet
ports connected to the front panel via the MV64360 system controller.
Ethernet access is provided by front panel RJ-45 connectors with
integrated magnetics and LEDs. Port 1 is a dedicated Gigabit Ethernet port
while a configuration header is provided for port 2 front or rear P2 access
Refer to
for more information.
Each Ethernet interface is assigned an Ethernet Station Address. The
address is unique for each device. The Ethernet Station Addresses are
displayed on labels attached to the PMC front-panel keep-out area.
The MV64360 is not integrated with a PHY for the Ethernet interfaces.
External PHY is the Broadcom BCM5421S (51NW9663B83 117BGA)
10/100/1000BaseT Gigabit transceiver with SERDES interface. Refer to
Appendix C, Related Documentation

SRAM

The MV64360 integrates 2Mb of general-purpose SRAM. It is accessible
from the CPU or any of the other interfaces. It can be used as fast CPU
access memory (6 cycles latency) and for off loading DRAM traffic. A
http://www.motorola.com/computer/literature
Front/Rear Ethernet and Transition Module Options Header (J30)
Gigabit Ethernet MACs
for more information.
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