Advanced Chipset Control - TYAN Tempest i5400PW User Manual

S5397
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3.3.1 Advanced Chipset Control

This section allows you to fine tune the chipset configuration.
Main
Integrated Device
Force PCI-E Gen2 slot to Gen1 mode
Dual Graphic WinXP support
Intel VT for Directed I/O (VT-d)
Crystal Beach Configure Enable
SERR signal condition
4GB PCI Hole Granularity
Memory Branch Mode
Branch 0 Rank Sparing
Branch 0 Rank Interleave
Branch 1 Rank Sparing
Branch 1 Rank Interleave
Enhanced x8 Detection
Forces ITK Config Clocking
Enable Multimedia Timer
Snoop Filter
F1
Help
← →
Esc
Exit
Force PCI-E Gen2 slot to Gen1 mode
Force PCI-E Gen2 port to operate at Gen1 mode for compatibility issue with some
PCI-E Gen1 cards.
Options: Auto / PCIE1 Slot / PCIE3 Slot / Both
Dual Graphic WinXP Support
Enabled for dual VGA card support under Windows XP.
Options: Disabled / Enabled
Intel VT for Directed I/O (VT-d)
Enable/Disable Intel Virtualization Technology for Directed I/O by report the I/O
device assignment to VMM through DRAM ACPI Tables.
Options: Disabled / Enabled
Crystal Beach Configure Enable
Enable the configuration of memory mapped accesses to the Crystal Beach
Configuration space located in Device 8, Fn 0 and Fn 1.
Options: Enabled / Disabled
SERR signal condition
PhoenixBIOS Setup Utility
Advanced
Advanced Chipset Control
↑↓
Select Item
Select Menu
http://www.tyan.com
Security
Power
[Auto]
[Disabled]
[Disabled]
[Disabled]
[Single bit]
[256 MB ]
[Interleave]
[4:1]
[Disabled]
[4:1]
[Disabled]
[Enabled]
[Disabled]
[No]
[Enabled]
-/+
Change Values
 Sub-Menu
Enter
Select
48
Boot
Exit
Item Specific Help
F9
Setup Defaults
F10
Previous Values

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