Advanced Chipset Control - TYAN TEMPEST I5000XL Manual

3.4.3 Advanced Chipset Control

Main Advanced
Advanced Chipset Control
Crystal Beach Configuration
Enable:
SERR signal condition:
4GB PCI Hole Granularity:
Memory Branch Mode:
Branch 0 Rank Interleave:
Branch 0 Rank Sparing:
Branch 1 Rank Interleave:
Branch 1 Rank Sparing:
Enhanced x8 Detection:
Force ITK Config Clocking:
Enable Multimedia Timer:
Snoop filter:
F1 Help
↑↓
Esc Exit
← →
SERR signal condition
Select ECC error conditions that SERR# be asserted.
None / Single bit / Multiple bit/ Both
4GB PCI Hole Granularity
This feature is used to select the granularity of PCI hole for PCI resource. If
MTRRs are not enough, we may use this option to reduce the MTRR
occupation.
256MB / 512MB / 1.0GB / 2.0GB
Memory Branch Mode
This option is used to select the type of memory operation mode.
Sequential / Interleave / Mirror / Single Channel 0
Branch 0/1 Rank Sparing
This option is used to enable/disable Branch 0 rank/DIMM sparing feature.
Disabled / Enabled
Enhanced x8 Detection
This feature is used to enable/disable enhanced x8 DRAM UC error detection.
PhoenixBIOS Setup Utility
Security
[Disabled]
[Single bit]
[256MB]
[Interleave]
[4:1]
[Disabled]
[4:1]
[Disabled]
[Enabled]
[Disabled]
[No]
[Enabled]
Select Item -/+
Select Menu Enter
Power
Item Specific Help
Change Values
Select
Sub-Menu
49
Boot Exit
F9 Setup Defaults
F10 Previous Values