Advanced Chipset Control - TYAN TEMPEST I5000PW Manual

3.3.1 Advanced Chipset Control

This section allows you to fine tune the chipset configuration.
Main
Advanced Chipset Control
ICH USB Control Sub-Menu
LAN Control Sub-Menu
Crystal Beach Configure Enable
SERR signal condition
4GB PCI Hole Granularity
Memory Branch Mode
Branch 0 Rank Sparing
Branch 1 Rank Sparing
Enhanced x8 Detection
Force ITK Config Clocking
WatchDog Timer
Enable Multimedia Timer
Parallel ATA:
Serial ATA:
Native Mode Operation:
SATA Controller Mode Option
F1 Help
Setup Defaults
Esc Exit
Previous Values
Crystal Beach Configure Enable
This feature is used to enable/disable the Crystal Beach.
Disabled / Enabled
SERR signal condition
Select ECC error conditions that SERR# be asserted.
None / Single bit / Multiple bit/ Both
4GB PCI Hole Granularity
This feature is used to select the granularity of PCI hole for PCI resource. If
MTRRs are not enough, we may use this option to reduce the MTRR
occupation.
256MB / 512MB / 1.0GB / 2.0GB
Memory Branch Mode
This option is used to select the type of memory operation mode.
PhoenixBIOS Setup Utility
Advanced
↑↓
Select Item
← →
Select Menu
http://www.TYAN.com
Power
Exit
Item Specific Help
These items control
various ICH USB device
[Enabled]
[Single bit]
[256 MB ]
[Interleave]
[Disabled]
[Disabled]
[Enabled]
[Disabled]
[Disabled]
[No]
[Enabled]
[Enabled]
[Auto]
[Compatible]
-/+ Change Values
Enter Select
53
Boot
F9
Sub-Menu F10