Documentation Changes - Intel SL7PG - Xeon 3.4 GHz/800MHz/1MB Cache CPU Processor Specification

Documentation Changes

Documentation Changes
Note: Documentation changes for IA-32 Intel
2A, 2B, and 3 will be posted in the separate document IA-32 Intel
Developer's Manual Documentation Changes. Follow the link below to become familiar with this
file.
http://developer.intel.com/design/pentium4/specupdt/252046.htm
There are no new Documentation Changes for this revision of the 64-bit Intel
Processor with 800 MHz System Bus (1 MB and 2 MB L2 Cache Versions) Specification Update.
The Documentation Changes listed in this section apply to the following documents:
1. 64-bit Intel
Link: http://developer/design/xeon/datashts/306249.htm
®
2. Intel
Link: http://developer/design/xeon/datashts/302355.htm
All Documentation Changes will be incorporated into a future version of the appropriate Intel
Xeon processor documentation.
46
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Xeon Processor with 2 MB L2 Cache Datasheet (Document Number 306249)
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Xeon Processor with 800 MHz System Bus Datasheet (Document Number 302355)
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Architecture Software Developer's Manual, Volumes 1,
® ®
64-bit Intel Xeon Processor with 800 MHz System Bus
(1 MB and 2 MB L2 Cache Versions) Specification Update
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Architecture Software
® ®
Xeon