Pentium Pro Cpu Architecture - Acer Altos 19000PRO4 System Manual

First-level and Second-level Cache
The Pentium Pro has a 16-KB first-level and 256/512/1024-KB
second-level cache. These caches produce a high hit rate that
reduces the processor's external memory bandwidth requirements.
Advanced Peripheral Interrupt Controller (APIC)
The APIC unit inside the CPU along with the I/O APIC unit facilitate
multiprocessor interrupt management. The APIC works with multiple
I/O subsystems where each subsystem have its own interrupts that
help minimize centralized system overhead.
Bus Controller
The bus controller integrated in the Pentium Pro CPU controls the
system bus to make it perform its functions efficiently. It ensures that
the bus serves as a reliable interconnection between one or two
CPUs, I/O bridge, and memory controllers.

Pentium Pro CPU Architecture

Figure 1-1 Pentium Pro CPU Architecture
1-2 AcerAltos 19000Pro4 System Guide