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8.6.3
Read circuit
After fixing the data output from the head IC to a certain level by Automatic Gain Control (AGC),
the Read circuit converts the waveform digitally by Analog to Digital Converter (ADC) circuit via
analog filter circuit. And then, after equalization by Finite Impulser Response filter (FIR filter),
being converted to logic signal by Viterbi detection circuit, convert into NRZ data by 32/34 decoding
circuit, and then the Read circuit sends the data to buffer memory.
(1)
AGC amplifier
The AGC amplifier automatically keeps the output amplitude level constant, even if the input
amplitude level changes. Even if the head output level changes with head characteristics and outer or
inner head position, the AGC amplifier output level is constant.
(2)
Analog filter, ADC, FIR filter and Viterbi detection circuits
AGC amplifier output is demodulated in MEEPRML method as a total process through analog filter
circuit, ADC circuit, FIR filter circuit and Viterbi detection circuit.
(3)
32/34 RLL decoding circuit
The 32/34 RLL decoding circuit decodes the viterbi detection circuit output signal. This decoding
circuit reverse converts (scrambles) the pseudorandom pattern (created at write) into NRZ data. The
NRZ data is then fed to the upper-level circuit.
8.7
Servo Control
The servomechanism is controlled using a digital servo technique by the firmware in the digital signal
processor (DSP).
DPS carries out VCM control. Control of the voice coil motor consists of track-following operation
control and seek operation control. Track-following operation is controlled to center the data-head-
mounted actuator over the target cylinder for read/write operation. The seek operation moves the
actuator to a different target cylinder at high speed. For stable operation, a variety of calibration is
done (see Section 8.5).
8.7.1
Servo control circuit
Figure 8.4 is the block diagram of the servo control circuit. The following explains each function of
the servo control circuit.
C141-E133-02EN
8.7 Servo Control
8-9
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