Signal Characteristics; Signal Reference Voltages - Intel CORE 2 DUO E4000 - DATASHEET 3-2008 Datasheet
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Also See for CORE 2 DUO E4000 - DATASHEET 3-2008:
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Table 8.
FSB Signal Groups (Sheet 2 of 2)
Signal Group
CMOS
Open Drain Output
Open Drain Input/
Output
FSB Clock
Power/Other
NOTES:
1.
Refer to
2.
In processor systems where no debug port is implemented on the system board, these
signals are used to support a debug port interposer. In systems with the debug port
implemented on the system board, these signals are no connects.
3.
The value of these signals during the active-to-inactive edge of RESET# defines the
processor configuration options. See
4.
PROCHOT# signal type is open drain output and CMOS input.
.
Table 9.
Signal Characteristics
A[35:3]#, ADS#, ADSTB[1:0]#, BNR#, BPRI#,
D[63:0]#, DBI[3:0]#, DBSY#, DEFER#,
DRDY#, DSTBN[3:0]#, DSTBP[3:0]#, HIT#,
HITM#, LOCK#, PROCHOT#, REQ[4:0]#,
RS[2:0]#, TRDY#
THERMTRIP#, FERR#/PBE#, IERR#, BPM[5:0]#,
BR0#, TDO, FCx
NOTES:
1. Signals that do not have R
.
Table 10.
Signal Reference Voltages
BPM[5:0]#, RESET#, BNR#, HIT#, HITM#, BR0#,
A[35:0]#, ADS#, ADSTB[1:0]#, BPRI#, D[63:0]#,
DBI[3:0]#, DBSY#, DEFER#, DRDY#, DSTBN[3:0]#,
DSTBP[3:0]#, LOCK#, REQ[4:0]#, RS[2:0]#,
TRDY#
NOTES:
1. These signals also have hysteresis added to the reference voltage. See
information.
26
Type
Clock
Section 4.2
for signal descriptions.
Signals with R
TT
1
Open Drain Signals
, nor are actively driven to their high-voltage level.
TT
GTLREF
Signals
A20M#, IGNNE#, INIT#, LINT0/INTR, LINT1/NMI,
SMI#, STPCLK#, PWRGOOD, TCK, TDI, TMS, TRST#,
BSEL[2:0], VID[6:1]
FERR#/PBE#, IERR#, THERMTRIP#, TDO
4
PROCHOT#
2
BCLK[1:0], ITP_CLK[1:0]
VCC, VTT, VCCA, VCCIOPLL, VCCPLL, VSS, VSSA,
GTLREF[1:0], COMP[8,3:0], RESERVED, TESTHI[13:0],
VCC_SENSE, VCC_MB_REGULATION, VSS_SENSE,
VSS_MB_REGULATION, DBR#
VTT_OUT_RIGHT, VTT_SEL, FCx, PECI, MSID[1:0]
Section 6.1
for details.
Signals with No R
A20M#, BCLK[1:0], BSEL[2:0],
COMP[8,3:0], IGNNE#, INIT#, ITP_CLK[1:0],
LINT0/INTR, LINT1/NMI, PWRGOOD,
RESET#, SMI#, STPCLK#, TESTHI[13:0],
VID[6:1], GTLREF[1:0], TCK, TDI, TMS,
TRST#, VTT_SEL, MSID[1:0]
A20M#, LINT0/INTR, LINT1/NMI,
IGNNE#, INIT#, PROCHOT#,
1
PWRGOOD
1
1
TDI
, TMS
Electrical Specifications
1
2
, VTT_OUT_LEFT,
TT
V
/2
TT
1
, SMI#, STPCLK#, TCK
,
1
, TRST#
Table 12
for more
Datasheet
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