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Enclustra Mercury+ MP1 User Manual

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Mercury+ MP1 SoC Module
Purpose
The purpose of this document is to present the characteristics of Mercury+ MP1 SoC module to the user,
and to provide the user with a comprehensive guide to understanding and using the Mercury+ MP1 SoC
module.
Summary
This document first gives an overview of the Mercury+ MP1 SoC module followed by a detailed description
of its features and configuration options. In addition, references to other useful documents are included.
Product Information
Product
Document Information
Reference / Version / Date
Approval Information
Written by
Verified by
Approved by
User Manual
Code
ME-MP1
Reference
D-0000-487-002
Name
WRUH, ABUE, SKOS
MMOS, GKOE
HREZ
Enclustra GmbH – Räffelstrasse 28 – CH-8045 Zürich – Switzerland
Name
Mercury+ MP1 SoC Module
Version
01
Position
Design Engineers
Design Expert
Manager, BU SP
Phone +41 43 343 39 43 – www.enclustra.com
Date
16.02.2023
Date
23.12.2022
26.01.2023
16.02.2023

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Summary of Contents for Enclustra Mercury+ MP1

  • Page 1 Mercury+ MP1 SoC Module User Manual Purpose The purpose of this document is to present the characteristics of Mercury+ MP1 SoC module to the user, and to provide the user with a comprehensive guide to understanding and using the Mercury+ MP1 SoC module.
  • Page 2 Unauthorized duplication of this document, in whole or in part, by any means is prohibited without the prior written permission of Enclustra GmbH, Switzerland. Although Enclustra GmbH believes that the information included in this publication is correct as of the date of publication, Enclustra GmbH reserves the right to make changes at any time without notice.

  • Page 3: Table Of Contents

    Enclustra Heat Sink ........
  • Page 4 SPI Flash Programming from an External SPI Master ......42 Enclustra Module Configuration Tool ........43 I2C Communication Overview .
  • Page 5 Operating Conditions Absolute Maximum Ratings ........48 Recommended Operating Conditions .

  • Page 6: Overview

    Together with Mercury+ base boards, the Mercury+ MP1 SoC module allows the user to quickly build a system prototype and start with application development. A Yocto layer is available for the Mercury+ MP1 SoC module. This layer allows the user to quickly build and run linux on the Mercury+ MP1 SoC module.

  • Page 7: Electrostatic Discharge

    1.1.7 Electromagnetic Compatibility The Mercury+ MP1 SoC module is a Class A product (as defined in IEC 61000-3-2 standard) and is not intended for use in domestic environments. The product may cause electromagnetic interference, for which appropriate measures must be taken.

  • Page 8: Reference Design

    1.3.2 Yocto BSP The Enclustra Yocto BSP Layer [16] enables the user to quickly set up a Yocto project and to run Linux on the Enclustra SoC module. The documentation describes the build process in detail and allows a user without Yocto knowledge to build and run a Linux reference design on the target hardware.

  • Page 9: Mercury+ St1 Base Board

    Please note that the available features depend on the Mercury module type and on the selected base board variant. Microchip Tool Support The SoC devices equipped on the Mercury+ MP1 SoC module are supported by the Microchip Libero SoC Design Suite software. A platinum license is required (support for S devices). Please contact Microchip for further information.

  • Page 10: Module Description

    Figure 1: Hardware Block Diagram The main component of the Mercury+ MP1 SoC module is the Microchip PolarFire SoC device. Most of its I/O pins are connected to the Mercury+ module connector, making up to 215 regular user I/Os available to the user.

  • Page 11: Module Configuration And Product Models

    A real-time clock is available on the Mercury+ MP1 SoC module. All clock signals which are required for the components equipped, are generated on the module. This in- cludes a 125 MHz differential clock for the SGMII and MSS clocking and a 50 MHz FPGA fabric clock.

  • Page 12: Module Label

    Figure 3: Module Label The correspondence between EN-number and product model for each revision is shown in Table 2. The revision changes and product known issues are described in the Mercury+ MP1 SoC Module Known Issues and Changes document [6].

  • Page 13: Top And Bottom Views

    Top and Bottom Views 2.4.1 Top View Figure 4: Module Top View 2.4.2 Bottom View Figure 5: Module Bottom View Please note that depending on the hardware revision and configuration, the module may look slightly dif- ferent than shown in this document. D-0000-487-002 13 / 53 Version 01, 16.02.2023...

  • Page 14: Top And Bottom Assembly Drawings

    Top and Bottom Assembly Drawings 2.5.1 Top Assembly Drawing R1205 C1609 R1203 R1606 U1200 R1607 C1800 U206 U500 U501 U502 R1206 R1605 R1204 C1204 C1201 R1604 R1901 C1919 R1902 C1200 R2003 R2013 R2012 R2002 C1233 R1310 R1101 C1422 C1421 C1926 R1314 R1315 R1308...

  • Page 15: Module Footprint And Mechanical Data

    Figure 8: Module Footprint and Dimensions - Top View and Side View Warning! It is possible to mount the Mercury+ MP1 SoC module the wrong way round on the base board - always check that the mounting holes on the base board are aligned with the mounting holes of the Mercury+ MP1 SoC module.

  • Page 16: Module Connector

    Parameter Value Size 54 mm Component height top 3.00 mm Component height bottom 1.9 mm Weight 36 g Table 3: Mechanical Data Module Connector Three Hirose FX10 168-pin 0.5 mm pitch headers with a total of 504 pins have to be integrated on the base board.

  • Page 17: User I/O

    User I/O 2.8.1 Pinout Information on the Mercury+ MP1 SoC module pinout can be found in the Enclustra Mercury Master Pinout [11], and in the additional document Enclustra Module Pin Connection Guidelines [10]. Warning! Please note that the pin types on the schematics symbol of the module connector and in the Master Pinout document are for reference only.

  • Page 18: I/O Pin Exceptions

    Both signals have a level of VCC_CFG on the connector and are connected to the FPGA via a level shifter to 1.2 V. I/O Pins with Level Shifter There are five signals on the Mercury+ MP1 SoC module that are routed from the FPGA banks to the module connector via level shifters - these are presented in Table 7. D-0000-487-002 18 / 53 Version 01, 16.02.2023...

  • Page 19: Signal Connection For Different Soc Types

    Additionally, there are 10 GPIOs (GPIO_B1_T3_L[1-5]_P/N) on the module connector that are connected to GPIO Bank 1. If the Mercury+ MP1 SoC module is equipped with a MPFS460 SoC device, these signals are additionally routed to HSIO Bank 0 via a 49.9 resistor.

  • Page 20: Differential I/Os

    The information regarding the length of the signal lines from the SoC device to the module connector is available in Mercury+ MP1 SoC Module IO Net Length Excel Sheet [3]. This enables the user to match the total length of the differential pairs on the base board if required by the application.

  • Page 21: Vcc_Io Usage

    VCC_IO_B[x], respectively VCC_CFG_[x] pins. All VCC_IO_B[x] or VCC_CFG_[x] pins of the same bank must be connected to the same voltage. For compatibility with other Enclustra Mercury modules, it is recommended to use a single I/O voltage per module connector.

  • Page 22: Signal Terminations

    For available on-die differential termination resistors please refer to the PolarFire FPGA and SoC FPGA User I/O User Guide [25]. 2.8.7 MSS I/O Pins Table 10 gives an overview over the MSS I/O pin connections on the Mercury+ MP1 SoC module. D-0000-487-002 22 / 53 Version 01, 16.02.2023...

  • Page 23: Multi-Gigabit Transceiver (Xcvr)

    Table 10: MSS I/O Pins Connections Overview Multi-Gigabit Transceiver (XCVR) The multi-gigabit transceivers on the Mercury+ MP1 SoC module are referred to as XCVR which are all con- nected to the FPGA of the SoC. There are 16 XCVR transceivers available which are organized in four quads.

  • Page 24: Xcvr Pairs

    -1 support data rates of up to 12.7 Gbit/sec. The SoC devices equipped on the Mercury+ MP1 SoC module can support up to one integrated PCIe Gen3 4 interfaces on the FPGA fabric, implemented using XCVR transceivers. This interface is only available within quad 0.

  • Page 25: Power

    Power Generation Overview The Mercury+ MP1 SoC module uses a 5 - 13.2 V DC power input for generating the on-board supply volt- ages (1.05/1 V, 1.2 V, 1.8 V, 2.2 V, 2.5 V, 3.3 V and 5.0 V). Some of these voltages (1.8 V, 2.5 V, 3.3 V) are accessible on the module connector.

  • Page 26: Power Enable/Power Good

    Power Enable/Power Good The Mercury+ MP1 SoC module provides a power enable input on the module connector. This input may be used to shut down the DC/DC converters and LDOs for 1.05/1 V, 1.2 V, 1.8 V, 2.2 V and 2.5 V. The list of regulators that can be disabled via PWR_EN signal is provided in Section 2.10.1.

  • Page 27: Voltage Supply Inputs

    2.10.3 Voltage Supply Inputs Table 15 describes the power supply inputs on the Mercury+ MP1 SoC module. The VCC voltages used as supplies for the I/O banks are described in Section 2.8.5. Pin Name Module Connector Pins Voltage Description VCC_MOD A-1, 2, 3, 4, 5, 6, 7, 8, 9, 11 5 - 13.2 V...

  • Page 28: Heat Dissipation

    For Mercury modules an Enclustra heat sink kit is available for purchase along with the product. It represents an optimal solution to cool the Mercury+ MP1 SoC module - the heat sink body is low profile and usually covers the whole module surface. The kit comes with a gap pad for the SoC device, a fan and required mounting material to attach the heat sink to the module PCB and baseboard PCB.

  • Page 29: Clock Generation

    2.11 Clock Generation A 50 MHz oscillator is used for the Mercury+ MP1 SoC module clock generation; the 50 MHz clock is fed to the HSIO bank 8 (pin AM5). A 125 MHz LVDS oscillator is connected to MSS. A 24 MHz clock and a 25 MHz clock are used for the USB PHY and Ethernet PHYs respectively.

  • Page 30: Leds

    LEDs There are four active-low user LEDs on the Mercury+ MP1 SoC module - two of them are connected to the FPGA fabric only. The other two are connected to the FPGA fabric and the MSS. This results in 6 LED control signals.

  • Page 31: Ddr4 Sdram Characteristics

    Please check the user manual regularly for updates. Any parts with different speed bins or temperature ranges that fulfill the requirements for the module variant may be used. 2.14.2 Signal Description Please refer to the Mercury+ MP1 SoC Module FPGA Pinout Excel Sheet [4] for detailed information on the DDR4 SDRAM connections. 2.14.3 Termination Warning! No external termination is implemented for the data signals on the Mercury+ MP1 SoC module.

  • Page 32: Ddr4 Sdram (Fpga Fabric)

    SoC devices (MPFS460TS-1FCG1152I) speeds up to 1600 Mbit/s (800 MHz) are supported by the memory controller and the equipped memory devices. The maximum FPGA fabric memory bandwidth on the Mercury+ MP1 SoC module using -1 speed grade rated devices is:...

  • Page 33: Signal Description

    Please check the user manual regularly for updates. Any parts with different speed bins or temperature ranges that fulfill the requirements for the module variant may be used. 2.15.2 Signal Description Please refer to the Mercury+ MP1 SoC Module FPGA Pinout Excel Sheet [4] for detailed information on the DDR4 SDRAM connections. 2.15.3 Termination Warning! No external termination is implemented for the data signals on the Mercury+ MP1 SoC module.

  • Page 34: Qspi Flash

    Table 26: QSPI Flash Type Warning! Other flash memory devices may be equipped in future revisions of the Mercury+ MP1 SoC module. Please check the user manual regularly for updates. Any parts with different speeds and temperature ranges that fulfill the requirements for the module variant may be used.

  • Page 35: Signal Description

    Table 27: SPI Flash Type Warning! Other flash memory devices may be equipped in future revisions of the Mercury+ MP1 SoC module. Please check the user manual regularly for updates. Any parts with different speeds and temperature ranges that fulfill the requirements for the module variant may be used.

  • Page 36: Emmc Flash

    SD card operation. This configuration routes the SDIO signals on MSS bank 4 to the module connector A. 2.20 Dual Gigabit Ethernet Up to two 10/100/1000 Mbps Ethernet PHYs are available on the Mercury+ MP1 SoC module. Both are connected via SGMII interfaces to the Microprocessor Subsystem. 2.20.1 Ethernet PHY Characteristics Table 28 describes the equipped Ethernet PHY devices type on the Mercury+ MP1 SoC module.

  • Page 37: Signal Description

    Table 29: Gigabit Ethernet PHYs Configuration - Bootstraps 2.21 USB 2.0 One USB 2.0 PHY is available on the Mercury+ MP1 SoC module. Is connected to the MSS to I/O bank 2 and can be configured as device or host. D-0000-487-002 37 / 53 Version 01, 16.02.2023...

  • Page 38: Usb Phy Characteristics

    USB core. 2.22 Real-Time Clock (RTC) The Mercury+ MP1 SoC module features a real-time clock. The RTC can be accessed by the I2C bus. 2.22.1 RTC Type Table 31 describes the equipped RTC device type on the Mercury+ MP1 SoC module.

  • Page 39: Trusted Platform Module (Tpm)

    An example demonstrating how to read data from the EEPROM is included in the Mercury+ MP1 SoC module reference design [2]. 2.24 Trusted Platform Module (TPM) The Trusted Platform Module (TPM) is used to enhance the system security and enabling the implementa- tion of a Trusted Computing Platform.

  • Page 40: Device Configuration

    3 Device Configuration Configuration Signals Table 34 describes the most important configuration pins and their location on the module connector. These signals allow the user to program the SPI flash and SoC via SPI. Please refer to Section 3.7 for details. Signal Mod.

  • Page 41: Spi Programming Modes

    JTAG interface. For more information on the JTAG programming mode please refer to section 3.4. For SPI configuration modes the SoC can either act as the slave or master. On the Mercury+ MP1 SoC mod- ule a third SPI programming mode can be configured, giving the user access to the SPI flash mermory by a external master and bypassing the SoC.

  • Page 42: External Connectivity

    Enclustra Module Pin Connection Guidelines for details on JTAG interface. Warning! On Enclustra base boards, the pin assignment of the JTAG connector is different than the Microchip FlashPro Programmer. An adapter needs to be used to interface with the Microchip FlashPro Program- mer.

  • Page 43: Enclustra Module Configuration Tool

    The internal flash of the Mercury+ MP1 SoC moduleis available to be programmed trought the SPI bus, but currently cannot be programmed with the MCT. The MCT, however, can be used to erase the contents of the internal flash starting with MCT version 2.10.

  • Page 44: I2C Communication

    4 I2C Communication Overview The I2C bus on the Mercury+ MP1 SoC module is connected to the SoC device, the EEPROM, to the DC/DC power converters, to the RTC and is available on the module connector. This allows external devices to read the module type and to connect more devices to the I2C bus.

  • Page 45: Secure Eeprom

    The secure EEPROM is used to store the module serial number and configuration. In the future, the EEPROM will be used for copy protection and licensing features. Please contact us for further information. An example demonstrating how to read data from the EEPROM is included in the Mercury+ MP1 SoC module Linux BSP.

  • Page 46: Product Information

    Module Product Information This field indicates the type of module and hardware revision. Module Product Family Reserved Revision Product Information Mercury+ MP1 SoC module 0x0339 0x[XX] 0x[YY] 0x0339 [XX][YY] Table 40: Product Information Module Configuration Addr. Bits Comment Min. Value Max.

  • Page 47: Soc Device Types

    Value SoC Device Type MPFS250T ES MPFS250TS MPFS460TS Table 42: SoC Device Types Table 43 shows the available speed grade. Value Module Speed Grade Standard Table 43: Module Speed Grade Table 44 shows the available temperature ranges. Value Module Temperature Range Industrial Extended Engineering Sample...

  • Page 48: Operating Conditions

    5 Operating Conditions Absolute Maximum Ratings Table 45 indicates the absolute maximum ratings for Mercury+ MP1 SoC module. Symbol Description Rating Unit VCC_MOD Supply voltage relative to GND -0.3 to 16 VCC_BAT Supply voltage for battery-backed RAM and battery-backed RTC -0.3 to 6...

  • Page 49: Recommended Operating Conditions

    Recommended Operating Conditions Table 46 indicates the recommended operating conditions for Mercury+ MP1 SoC module. Symbol Description Rating Unit VCC_MOD Supply voltage relative to GND 4.75 to 13.86 VCC_BAT Supply voltage for battery-backed RAM and battery- 1.8 to 5.5 backed RTC...

  • Page 50: Ordering And Support

    6 Ordering and Support Ordering Please use the Enclustra online request/order form for ordering or requesting information: http://www.enclustra.com/en/order/ Support Please follow the instructions on the Enclustra online support site: http://www.enclustra.com/en/support/ D-0000-487-002 50 / 53 Version 01, 16.02.2023...
  • Page 51 List of Figures Hardware Block Diagram ........10 Product Model Fields .
  • Page 52 Product Information ......... . . 46 Module Configuration .
  • Page 53 [19] Mercury Heatsink Application Note Ask Enclustra for details [20] Mercury+ MP1 SoC Module FPGA Pinout Assembly Variants Excel Sheet [21] PolarFire FPGA and PolarFire SoC FPGA PCI Express, UG0685, Microchip, 2022 [22] PolarFire SoC FPGA Packaging and Pin Descriptions, UG0902, Microchip, 2021...

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