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Summary of Contents for Arbor Technology EmCORE-i2802
- Page 1 EmCORE-i2802 ® ® Intel Elkhart Lake Celeron N6210 / ® Atom x6413E Processor 3.5” Compact Board User’s Manual Version 1.0 2024.06...
- Page 2 Revision History Version Release Time Description 2024.06 Initial release - 2 -...
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Page 3: Table Of Contents
Contents Contents Preface ................iii Copyright Notice ............. iii Declaration of Conformity ..........iii CE ..................iii RoHS .................. iv SVHC / REACH ..............iv About This User’s Manual ..........v Warning ................v Replacing the Lithium Battery .........v Technical Support ............v Warranty ................. vi Chapter 1 - Introduction ..........1 1.1. - Page 4 Contents 3.2.6 Hardware Monitor ............50 3.2.7 S5 RTC Wake Settings ...........51 3.2.8 USB Configuration ..........52 3.2.9 Network Stack Configuration ........54 3.3 Chipset ..............55 3.3.1 System Agent (SA) Configuration ......56 3.3.2 PCH-IO Configuration ..........58 3.4 Security ..............60 3.5 Boot ................61 3.6 Save & Exit .............62 Appendix .................63 Appendix A.
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Page 5: Preface
Preface Preface Copyright Notice All Rights Reserved. The information in this document is subject to change without prior notice in order to improve the reliability, design and function. It does not represent a commitment on the part of the manufacturer. Under no circumstances will the manufacturer be liable for any direct, indirect, special, incidental, or consequential damages arising from the use or inability to use the product or documentation, even if advised of the possibility of such... -
Page 6: Rohs
RoHS ARBOR Technology Corp. certifies that all components in its products are in compliance and conform to the European Union’s Restriction of Use of Hazardous Substances in Electrical and Electronic Equipment (RoHS) Directive 2002/95/EC. -
Page 7: About This User's Manual
Preface of SVHC (Substances of Very High Concern) in (EC) 1907/2006 (REACH --Registration, Evaluation, Authorization, and Restriction of Chemicals) regulated by the European Union. All substances listed in SVHC < 0.1 % by weight (1000 ppm) About This User’s Manual This user’s manual provides general information and installation instructions about the product. -
Page 8: Warranty
Preface Warranty This product is warranted to be in good working order for a period of two years from the date of purchase. Should this product fail to be in good working order at any time during this period, we will, at our option, replace or repair it at no additional charge except as set forth in the following terms. -
Page 9: Chapter 1 Introduction
Chapter 1 Introduction Chapter 1 - Introduction... -
Page 10: Packing List
Introduction 1.1. Packing List Before starting with the installation, make sure the following items are shipped. If any item appears damaged or is missing, contact your vendor immediately: 1 x EmCORE-i2802 3.5” ® ® Intel Elkhart Lake Celeron N6210 Compact Board / ®... -
Page 11: Specifications
Introduction 1.4. Specifications Form Factor 3.5" Compact Board ® ® Soldered onboard for Intel Elkhart Lake / Celeron N6210 ® 1.2GHz/ Atom x6413E 1.5GHz Processor 1 x DDR4 SO-DIMM socket, up to 16GB DDR4 3200 MT/s Memory SDRAM BIOS AMI BIOS Watchdog Timer 1~255 levels reset Serial Port... -
Page 12: Board Dimensions
Introduction 1.5. Board Dimensions 98.6 142.8 142.8 98.6 Unit: mm - 4 -... -
Page 13: Installing The Memory
Introduction 1.6 Installing the Memory Latch knob Side notch Latch section Latch claw Latch arm Polarizing key To install the Memory module, locate the Memory SO-DIMM slot on the board and perform as below: 1. Adjust the socket polarizing key and the board key to the same direction. 2. - Page 14 This page is intentionally left blank. - 6 -...
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Page 15: Chapter 2 Installation
Chapter 2 Installation Chapter 2 - Installation... -
Page 16: Block Diagram
Installation 2.1. Block Diagram PWR1 Mini-Display connector 8V - 13.2V DC-in lB6B-XH-A SODIMM1 DDR4-3200MT/s Dual Chnnels 24-bit LVDS DDR4 SO-DIMM LVDS1 PTN3460 socket DF50-40DP-1V(52) HRS SATA1, 2 SATA0, 1 (600Gb/s) SATA connector Dual Channels 24-bit LVDS LVDS2 PTN3460 DF50-40DP-1V(52) HRS 1 x PCIex1, USB 2.0 Mini-Card half size socket Intel... -
Page 17: Jumpers & Connectors Quick Reference
Installation 2.2. Jumpers & Connectors Quick Reference 2.2.1 Jumpers Jumper Description ➊ AT/ATX Power Mode Selection JPWR1 ➋➌ LVDS1, 2 LCD Voltage Selection JVLCD1, 2 ➍ CMOS Setting JBAT1 ➎➏ LVDS1, 2 LCD Inverter Voltage Selection JINV1, 2 2.2.2 Connectors Connector Description (1)CN1... - Page 18 Installation (28)BAT1 Battery Connector (29)JLPC1 LPC to 80 Port Debug Card Connector (30)DIMM1 DDR4 SO-DIMM Socket - 10 -...
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Page 19: Jumpers & Connectors Location
Installation 2.3. Jumpers & Connectors Location Board Top (10)USB3 (12)JPWRSW1 (14)LVDS2 (15)LVDS1 (11)JFRT1 (9)USB2 JPWR1 (8)SPK1 (13)AUDIO1 (16)SATA1 (26)MC2 (7)DP1 (27)SIM1 USB1 (25)MC1 (17)SATAPWR1 (6)LAN1 JINV2 JINV1 (18)SATA2 (29)JLPC1 (28)BAT1 (19)SATAPWR2 (5)LAN2 (20)COM5 (4)COM2 /COM3 (21)COM6 (22)FAN1... -
Page 20: Jumpers
Installation 2.3.1. Jumpers ➊ JPWR1: AT/ATX Power Mode Selection Connector type: 2.0mm pitch 1x3 pin header Power Mode Selection ATX Mode (Default) AT Mode JPWR1 - 12 -... - Page 21 Installation ➋ JVLCD1: LVDS1 LCD Voltage ➌ JVLCD2: LVDS2 LCD Voltage The voltage of LVDS1 and LVDS2 LCD panel could be selected by JVLCD1 and JVLCD1 in +5V or +3.3V. Connector type: 2.0mm pitch 1x3 pin header Voltage +3.3V (Default) JVLCD1: LVDS1 LCD Voltage;...
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Page 22: Pin Mode
Installation ➍ JBAT1: CMOS Setting Connector type: 2.0mm pitch 1x3-pin header Pin Mode 1-2 Keep CMOS (Default) 2-3 Clear CMOS JBAT1: CMOS Setting - 14 -... - Page 23 Installation ➎ JINV1: LVDS1 LCD Inverter Voltage Selection ➏ JINV2: LVDS2 LCD Inverter Voltage Selection The voltage of LVDS1 and LVDS2 LCD panel inverter could be selected by JINV1 and JINV2 in 12V or +5V. Connector type: 2.0mm pitch 1×3 pin header Pin Mode 1-2 +12V (default) 2-3 +5V...
- Page 24 Installation 2.3.2. Connectors (1)CN1: DREWR Connector Connector type: RJ-11 Connector Description FRAME GND DRWER1 SW_IN DRWER2 CN1: DREWR Connector - 16 -...
- Page 25 Installation (2)COM1: RS-232 Serial Port Connector Connector type: 1.25mm pitch 1x9-pin wafer connector Description no connection +5V/RI (JRS1 Switchable) COM1 - 17 -...
- Page 26 Installation (3)COM4: Serial Port Connector Connector type: 8-Pin mini DIN connector Description +V5S COM4 - 18 -...
- Page 27 Installation (4)COM2/COM3: RS-232 Serial Port Connector Connector type: External 9-pin D-sub male connector. Description COM3 COM2 COM3, COM2 - 19 -...
- Page 28 Installation (5)LAN2: RJ-45 LAN and USB 2.0 Stack Connectors (6)LAN1: RJ-45 LAN and USB 2.0 Stack Connectors Connector type: RJ-45 LAN and double-stacked USB connectors The pin assignments conform to the industry standard. LAN1 LAN2 - 20 -...
- Page 29 Installation (7)DP1 & USB1: USB 3.0 Stack Connectors and DisplayPort Connector type: Double-stacked USB connectors and DisplayPort The pin assignments conform to the industry standard. DP1 & USB - 21 -...
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Page 30: Pin Description
Installation (8)SPK1: 2Watt (rms)/4Ω per Channel Speaker Output Connector Connector type: 1.25mm pitch 1x4 pin header Description SP_R- SP_R+ SP_L- SP_L+ SPK1 - 22 -... - Page 31 Installation (9)USB2: USB Hub Connector (10)USB3: USB Hub Connector Connector type: 1.25mm pitch 1x5 pin header Description USB_+5V USB- USB+ USB3 USB2 - 23 -...
- Page 32 Installation (11)JFRT1: Switches and Indicators Connector type: 2.0mm pitch 2x4 pin wafer connector Pin Description Pin Description POWER_LED- POWER_LED+ HDD_LED- HDD_LED+ 12V_- 12V_+ RESET- RESET+ JFRT1 - 24 -...
- Page 33 Installation (12)JPWRSW1: Power Switches and LED Connector type: 1.25mm pitch 1x4 pin wafer connector Pin Description PSON+ PSON- POWER_LED2+ POWER_LED2- JPWRSW1 - 25 -...
- Page 34 Installation (13)AUDIO1: MIC, LINE Audio connector Connector type: 1.25mm pitch 1x5 pin connector Description LINE IN L LINE IN R AUDIO1 - 26 -...
- Page 35 Installation (14) LVDS2: LVDS Connector (15) LVDS1: LVDS Connector Connector type: 1.25mm pitch 2x20 pin connector, supporting 18/24 bit single/ dual channels Pin Description Pin Description LCD_ 2 LCD_ VDD(+3.3V/+5V) VDD(+3.3V/+5V) 4 LCD_ VDD(+3.3V/+5V) LVDS_DA0- 6 LVDS_DB0- LVDS_DA0+ 8 LVDS_DB0+ 10 GND 11 LVDS_DA1- 12 LVDS_DB1-...
- Page 36 Installation LVDS1 LVDS2 - 28 -...
- Page 37 Installation (16)SATA1: SATA Connector Channel 0 (18)SATA2: SATA Connector Channel 1 Connector type: SATA Connector The pin assignments conform to the industry standard. SATA1 SATA2 - 29 -...
- Page 38 Installation (17)SATAPWR1: SATA Power Connector (19)SATAPWR2: SATA Power Connector Connector type: 2.0mm pitch 1x2-pin wafer connector Description +5VS SATAPWR1 SATAPWR2 - 30 -...
- Page 39 Installation (20)COM5: RS-232 Serial Port Connector (21)COM6: RS-232 Serial Port Connector Connector type: 1.25mm pitch 1x9-pin wafer connector Description COM5: RI / COM6: +V5S COM5 COM6 - 31 -...
- Page 40 Installation (22)FAN1: Smart Fan Connector Connector type: 1.25mm pitch 1x3-pin wafer connector Description +5V~3V FANIN1 FAN1 - 32 -...
- Page 41 Installation (23)PWRIN1: DC +12V Power Input Connector Connector type: 2.5mm pitch 1x8 pin header Description VIN: 8V~13.2V VIN: 8V~13.2V +5V LED COM1 DSR VIN:+24V PWRIN1 - 33 -...
- Page 42 Installation (24)DIO1: Digital I/O Connector Connector type: 2.0mm pitch 2x5 pin wafer connector Desc. Desc. DIO1 DIO0 DIO3 DIO2 DIO5 DIO4 DIO7 DIO6 V5S+ DIO1 - 34 -...
- Page 43 Installation (25)MC1: Full size Mini-Card Socket (26)MC2: Half size Mini-Card Socket Connector type: Onboard 0.8mm-pitch 52-pin edge card connector The pin assignments conform to the industry standard. - 35 -...
- Page 44 Installation (27)SIM1: MC1 NANO SIM Socket Connector type: SMD,6P,1.27mm, H1.5 socket Pin Desc. Pin Desc. C1 VCC C2 RST C3 CLK C5 GND C6 VPP C7 I/O SIM1 - 36 -...
- Page 45 Installation (28)BAT1: Battery Connector Connector type: 1.25mm pitch 1x2-pin connector. Description Battery Power BAT1 - 37 -...
- Page 46 Installation (29)JLPC1: LPC to 80 Port Debug Card Connector Connector type: 1.25mm pitch 2x5 pin header Description Pin Description LPC_CLK0 2 GND LPC_ 3.3V_LPC_ LFRAME LAD0 PLTRST 6 N/C LPC_LAD3 8 LPC_LAD2 +3.3VS 10 LPC_LAD1 JLPC1 - 38 -...
- Page 47 Installation (30)DIMM1: DDR4 SO-DIMM Socket Connector type: DDR4 SO-DIMM socket supporting 3200MHz SDRAM up to 16GB DIMM1 DIMM1 - 39 -...
- Page 48 This page is intentionally left blank. - 40 -...
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Page 49: Chapter 3 - Bios
Chapter 3 BIOS Chapter 3 - BIOS... -
Page 50: Main
BIOS 3.1 Main The AMI BIOS provides a Setup utility program for specifying the system configurations and settings. The BIOS RAM of the system stores the Setup utility and configurations. When you turn on the computer, the AMI BIOS is immediately activated. - Page 51 BIOS Key Commands BIOS Setup Utility is mainly a key-based navigation interface. Please refer to the following key command instructions for navigation process. Keystroke Function Move to highlight a particular configuration screen from ← → the top menu bar / Move to highlight items on the screen ↓...
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Page 52: Advanced
BIOS 3.2 Advanced Setting Description CPU Configuration See section 3.2.1 CPU Configuration on page 45 Power & Performance See section 3.2.2 Power & Performance on page 46 Trusted Computing See section 3.2.3 Trusted computing on page 47 ACPI Settings See section 3.2.4 ACPI Settings on page 48 F81966 Super IO See section... -
Page 53: Cpu Configuration
BIOS 3.2.1 CPU Configuration Setting Description Enable or disable Intel virtualization technology. When enabled, a VMM can utilize the additional Intel (VMX) Virtualization hardware capabilities provided by Vanderpool Technology Technology. Options: Enabled (default) or Disabled. ► - 45 -... -
Page 54: Power & Performance
BIOS 3.2.2 Power & Performance Setting Description CPU-Power management control options. Enable or disable Intel SpeedStep. Intel(R) ► Options: Enabled (default) / CPU- Power SpeedStep(tm) Disabled. Management Control Enable or disable the turbo mode. Turbo Mode ► Options: Enabled (default) / Disabled. -
Page 55: Trusted Computing
BIOS 3.2.3 Trusted computing Setting Description Enable (default) or Disable the BIOS support for Security Device Support security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. SHA256 PCR Bank Enable (default) or Disable SHA256 PCR Bank. Schedule an Operation for the security Device. -
Page 56: Acpi Settings
BIOS 3.2.4 ACPI Settings Setting Description Enable (default) or Disable System ability to Hibernate Enable Hibernation (OS/S4 Sleep State). This option may be not effective with some Operating Systems. Select the highest ACPI sleep state the system will enter when the SUSPEND button is pressed. ACPI Sleep State Options: Suspend Disabled and S3 (Suspend to ►... -
Page 57: F81966 Super Io Configuration
BIOS 3.2.5 F81966 Super IO Configuration Setting Description Serial Port 1~6 Configuration Set Parameters of Serial Port 1~6. - 49 -... -
Page 58: Hardware Monitor
BIOS 3.2.6 Hardware Monitor Access this submenu to monitor the hardware status. Setting Description Smart fan1 setting. Allows more than two frequency ranges to be supported. FAN TYPE Options: DAC Linear (default) / ► Smart Fan1 Disabled. configuration CPU Smart Fan function settings. Fan mode selection: FAN MODE ►... -
Page 59: S5 Rtc Wake Settings
BIOS 3.2.7 S5 RTC Wake Settings The featured submenus are: Setting Description Wake system from Select System wake on alarm event. Options: Disabled(default)/Fixed Time/Dynamic Time. ► Sets if to awake the system at a defined moment. Defines the (hour) time to wake the Wake up hour system. -
Page 60: Usb Configuration
BIOS 3.2.8 USB Configuration Setting Description Sets legacy USB support. ► Options: Enabled (default), Disabled and Auto. Legacy USB AUTO option disables legacy support if no USB devices Support are connected. Disable option will keep USB devices available only for EFI applications. - Page 61 BIOS Use this item to set USB mass storage device start unit command time-out. Device reset time-out Options available are: 10 sec, 20 sec (default), ► 30 sec, 40 sec Use this item to set maximum time the device will take before it properly reports itself to the host controller.
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Page 62: Network Stack Configuration
BIOS 3.2.9 Network Stack Configuration Setting Description Enables/Disables UEFI Network Stack. Network Stack Disabled is the default. ► - 54 -... -
Page 63: Chipset
BIOS 3.3 Chipset Setting Description System Agent (SA) See section 3.3.1 System Agent (SA) Configuration on Configuration page 56 PCH-IO Configuration See section 3.3.2 PCH-IO Configuration on page 58 - 55 -... -
Page 64: System Agent (Sa) Configuration
BIOS 3.3.1 System Agent (SA) Configuration 3.3.1.1 Memory Configuration Setting Description Memory Access to view the memory configuration. Configuration 3.3.1.2 Graphics Configuration Setting Description Select DVMT 5.0 Pre-Allocated(Fixed) Graphics Memory DVMT Pre-Allocated size from 4M to 160MB used by the Internal Graphics Device. - Page 65 BIOS Select the Video Device which will be activated during POST. This has no effect if external graphics present. Primary IGFX Secondary boot display selection will Boot Display appear based on your selection. VGA modes will be supported only on primary display.
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Page 66: Pch-Io Configuration
BIOS 3.3.2 PCH-IO Configuration 3.3.2.1 PCI Express Configuration: Setting Description ► RealTek LAN-1/2: Enables or Disables LAN-1/2 ASPM: Set the ASPM level ► RealTek LAN-1/2 ► L1 Substates: PCI Express L1 substates settings ► PCIe Speed: Configure PCIe speed Mini Card-1/2: Enables or Disables Mini Card-1/2 ►... - Page 67 BIOS 3.3.2.3 USB Configuration: Setting Description Option to enable Compliance Mode. Default is to disable XHCI Compliance Compliance Mode. Change to enabled for Compliance Mode Mode testing. xDCI Support Enable/Disable xDCI (USB OTG Device). USB2 PHY Sus Select “Enabled” to enable SUS Well PG for USB2 PHY. This Well Power option has no effect on PCH-H.
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Page 68: Security
BIOS 3.4 Security The Security menu sets up the administrator password. Setting Description To set up an administrator password: Select Administrator Password. Administrator The screen then pops up an Create New Password dialog. Password Enter your desired password that is no less than 3 characters and no more than 20 characters. -
Page 69: Boot
BIOS 3.5 Boot Setting Description Use this item to set number of seconds to wait for setup Setup Prompt Timeout activation key. 65535 (0xFFFF) means indefinite waiting. Select the keyboard NumLock state. Bootup NumLock State ► Options: On (default) and Off. Quiet Boot Enable (default) or Disable Quiet Boot option. -
Page 70: Save & Exit
BIOS 3.6 Save & Exit Setting Description Exit system setup after saving the changes. Save Changes and ► Enter the item and then a dialog box pops up: Reset Save configuration and reset? (Yes/ No) Exit system setup without saving the changes. Discard Changes and ►... -
Page 71: Appendix
Appendix Appendix - 63 -... -
Page 72: Appendix A. Watchdog Timer (Wdt) Setting
Appendix Appendix A. Watchdog Timer (WDT) Setting WDT is widely used for industrial application to monitor CPU activities. The application software depends on its requirement to trigger WDT with adequate timer setting. Before WDT timeout, the functional normal system will reload the WDT. The WDT never time-out for a normal system. - Page 73 Appendix outportb(0x62, 0x00); /* Minute is 1 count unit by minute Minute is 0 count unit by second */ - 65 -...
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Page 74: Appendix B. Digital I/O Setting
Appendix Appendix B. Digital I/O Setting Digital I/O can read from or write to a line or an entire digital port, which is a collection of lines. This mechanism helps users achieve various applications such as industrial automation, customized circuit, and laboratory testing. Take the source code below that is written in C for the digital I/O application example. - Page 75 Appendix outportb(sioIndex,0x87); outportb(sioIndex,0x07); /* Select logic device – GPIO */ outportb(sioData, 0x06); outportb(sioIndex,0x89); /* GPIO 80~87 - Output Data */ outportb(sioData,iData); outportb(sioIndex,0xAA); /* Disable Super I/O */ int SioGPIOStatus() int iStatus = 0x00; outportb(sioIndex,0x87); /* Enable Super I/O */ outportb(sioIndex,0x87); outportb(sioIndex,0x07); /* Select logic device – GPIO */ outportb(sioData, 0x06); outportb(sioIndex,0x8A); /* GPIO 80~87 - Status */ iStatus = inportb(sioData); outportb(sioIndex,0xAA); /* Disable Super I/O */ return iStatus; - 67 -...
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