Analog Devices AD9779A Quick Start Manual page 8

Quick Start Guide AD9779A/78A/76A-DPG2-EBZ
Figure 9 AD9779A Evaluation Board
Using the AD9516
The AD9516 is included so you can test the performance i.e. ACLR with the AD9516 clock multiplication. In order to drive the DAC
Clock from AD9516 the jumper J5 and J6 needs to be changed shown in figure 10 a and 10 b. You also need to start up the AD9516 SPI
VI that is included in the CD software. First type in your Ref frequency, example in Figure 11 is 122.88 MHz. The Prescaler "P", A and B
counters need to be adjusted until you get a Vco Frequency in the range 2.3 to 2.65MHz. The Ref freq will be multiplied by ( P*B+A), in
this example we used 20
P=8 labeled "divide by 8", B=2, A=4 which yield VCO of 2.4576GHz. We actually want the DAC clock, which will be connected to the
PECL output, to be at 4x the reference clock. The VCO divide ratio of 5 along with channel divider bypassed (multiplies by 10 which
yields 491.52MHz). There is also an auxiliary output which comes out on SMA J10 and J14. In this example the channel divider 4 is set to
2 which divides the freq by 2 to 245.76MHz and is LVDS type outputs.
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