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Application Note Abstract
This application note discusses how to configure the General Programmable Interface (GPIF) and slave FIFOs of the EZ-USB
FX2LP™ to implement an 8-bit asynchronous interface. The GPIF is a programmable 8 or 16-bit parallel interface that reduces
system costs by providing a glueless interface between the EZ-USB FX2LP and different types of external peripherals. The
GPIF allows the EZ-USB FX2LP to perform local bus mastering to external peripherals implementing a wide variety of protocols.
For example, EIDE/ATAPI, printer parallel port (IEEE P1284), Utopia, and other interfaces are supported using the GPIF block
of the EZ-USB FX2LP. In this example, it masters the slave FIFO interface of another EZ-USB FX2LP.
This implementation uses the GPIF Designer (an utility Cypress provides to create GPIF waveform descriptors) to design the
application specific physical layer. The firmware is based on the Cypress EZ-USB FX2LP firmware 'frameworks'. A hardware
setup of two back-to-back EZ-USB FX2LP boards is also used, one acting as a master and another as a slave. Familiarity with
the EZ-USB FX2LP development kit, examples and documentation on the development kit CD-ROM, and chapters 9 (EZ-USB
FX2LP Slave FIFOs) and 10 (GPIF) of the EZ-USB FX2LP Technical Reference Manual is assumed
Introduction
The objective of this application note is to:
■
Demonstrate a glueless interface to an 8-bit peripheral
data bus (the FIFO of a slave EZ-USB FX2LP).
■
Use EZ-USB FX2LP to transfer data to and from the pe-
ripheral (slave EZ-USB FX2LP) and the USB host.
February 19, 2008
Implementing an 8-Bit Asynchronous Interface
This application note discusses the necessary hardware con-
nections, internal register settings, and 8051 firmware imple-
mented to execute data transactions over the interface and
across the USB bus.
Figure 1. Hardware Connection Diagram
Document No. 001-15342 Rev. **
with FX2LP
Author: Sonia Gandhi
Associated Project: No
Associated Part Family: CY7C68013A
GET FREE SAMPLES HERE
Software Version: None
Associated Application Notes: None
.
AN6077
1
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Related Manuals for Cypress Semiconductor AN6077
Summary of Contents for Cypress Semiconductor AN6077
- Page 1 USB bus. Figure 1. Hardware Connection Diagram Document No. 001-15342 Rev. ** with FX2LP AN6077 Author: Sonia Gandhi Associated Project: No GET FREE SAMPLES HERE Software Version: None [+] Feedback...
- Page 2 ‘not empty’, proceed to s1 else go to s6 where an interrupt is triggered and the waveform is aborted. Assert the SLRD strobe and wait for three cycles to meet the tRD Sample the data bus. Branch to IDLE. Document No. 001-15342 Rev. ** AN6077 parameter. [+] Feedback...
- Page 3 GPIF Designer view of the FIFO Write waveform. Figure 4 waveforms in the gpif.c file. This is the same as is seen in the GPIF Tool utility. Document No. 001-15342 Rev. ** AN6077 parameter. Figure 5 show the view of the GPIF [+] Feedback...
- Page 4 GPIF to launch any form of physical bus transactions. The firmware is optimized for 512-byte FIFO Reads and Writes with other mechanisms in place to handle short packets (1–511 bytes). Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 5 PKTEND of the slave. In this implementation, the PKTEND of the slave is tied to CTL2 of the master. So the GPIFIDLECTL register is writ- ten to strobe PKTEND. Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 6 // check if peripheral is "not empty" if( GPIFREADYSTAT & 0x01 ) // RDY0=1, when peripheral is "not empty" // drive FIFOADDR lines OEA = 0xC0; IOA = 0x00; February 19, 2008 Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 7 This application note is centered around a specific back-to- back board setup with two EZ-USB FX2LP boards. However, many concepts and insights conveyed in this document can be applied to and used as a basic framework for mainstream applications. Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 8 // CLKSPD[1:0]=10, for 48 MHz operation // CLKOE=0, don't drive CLKOUT // init GPIF engine via GPIFTool output file // see TRM section 15.14 // REVCTL.1=1; // BUF[1:0]=00 for 4x buffering // BUF[1:0]=00 for 4x buffering Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 9 // reset, FIFO 2 // reset, FIFO 4 // reset, FIFO 6 // reset, FIFO 8 // deactivate NAK-ALL // arm first buffer // arm second buffer // arm third buffer // arm fourth buffer Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 10 // RDY1=1, when peripheral is "not" FULL (tied to peripheral "full" flag) // drive FIFOADDR lines OEA = 0xC0; IOA = 0x80; xFIFOTC_OUT = ( ( EP2FIFOBCH << 8 ) + EP2FIFOBCL ); February 19, 2008 Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 11 // DONE=0 when GPIF is "not" IDLE // Handle IN data // is the GPIF idle if( GPIFTRIG & 0x80 ) // check if peripheral is "not empty" if( GPIFREADYSTAT & 0x01 ) February 19, 2008 Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 12 // core commits packet via EPxAUTOINLENH/L registers else // master has all the data the peripheral sent else // peripheral interface busy February 19, 2008 // w/skip=0;commit however many bytes in packet. Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 13 // set core AUTO commit len = 512 bytes // max. pkt. size = 512 bytes // set core AUTO commit len = 64 bytes // max. pkt. size = 64 bytes Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 14 USBIRQ = bmSOF; // Clear SOF IRQ void ISR_Ures( void ) interrupt 0 if ( EZUSB_HIGHSPEED( ) ) pConfigDscr = pHighSpeedConfigDscr; pOtherConfigDscr = pFullSpeedConfigDscr; else pConfigDscr = pFullSpeedConfigDscr; pOtherConfigDscr = pHighSpeedConfigDscr; February 19, 2008 Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 15 ISR_Ep4inout( void ) interrupt 0 void ISR_Ep6inout( void ) interrupt 0 void ISR_Ep8inout( void ) interrupt 0 void ISR_Ibn( void ) interrupt 0 void ISR_Ep0pingnak( void ) interrupt 0 February 19, 2008 Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 16 AN6077 void ISR_Ep1pingnak( void ) interrupt 0 void ISR_Ep2pingnak( void ) interrupt 0 void ISR_Ep4pingnak( void ) interrupt 0 void ISR_Ep6pingnak( void ) interrupt 0 void ISR_Ep8pingnak( void ) interrupt 0 void ISR_Errorlimit( void ) interrupt 0 void ISR_Ep2piderror( void ) interrupt 0...
- Page 17 // abort to handle shortpkt // automatically enabled at POR // Do not generate interrupt vectors // SYNCDELAY macro // Received setup data flag // Current configuration // Alternate settings // CLKSPD[1:0]=10, for 48 MHz operation Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 18 // all signals active low // clear valid bit // clear valid bit // AUTOOUT=0, WORDWIDE=0 // arm first buffer // arm second buffer // arm third buffer // arm fourth buffer Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 19 TRUE ); // Handled by user code BOOL DR_GetConfiguration( void ) { // Called when a Get Configuration command is received February 19, 2008 // AUTOOUT=1, WORDWIDE=0 // AUTOIN=1, ZEROLENIN=1, WORDWIDE=0 Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 20 // Clear SUDAV IRQ // Setup Token Interrupt Handler void ISR_Sutok( void ) interrupt 0 EZUSB_IRQ_CLEAR( ); USBIRQ = bmSUTOK; // Clear SUTOK IRQ void ISR_Sof( void ) interrupt 0 EZUSB_IRQ_CLEAR( ); February 19, 2008 Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 21 ISR_Ep0in( void ) interrupt 0 void ISR_Ep0out( void ) interrupt 0 void ISR_Ep1in( void ) interrupt 0 void ISR_Ep1out( void ) interrupt 0 void ISR_Ep2inout( void ) interrupt 0 February 19, 2008 Document No. 001-15342 Rev. ** AN6077 [+] Feedback...
- Page 22 AN6077 void ISR_Ep4inout( void ) interrupt 0 void ISR_Ep6inout( void ) interrupt 0 void ISR_Ep8inout( void ) interrupt 0 void ISR_Ibn( void ) interrupt 0 void ISR_Ep0pingnak( void ) interrupt 0 void ISR_Ep1pingnak( void ) interrupt 0 void ISR_Ep2pingnak( void ) interrupt 0...
- Page 23 Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. February 19, 2008 Document No. 001-15342 Rev. ** AN6077 Cypress Semiconductor 198 Champion Court San Jose, CA 95134-1709...
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