Cypress Semiconductor CY7C1019D Specification Sheet

1-mbit (128k x 8) static ram

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Features
• Pin- and function-compatible with CY7C1019B
• High speed
— t
= 10 ns
AA
• Low active power
— I
= 80 mA @ 10 ns
CC
• Low CMOS standby power
— I
= 3 mA
SB2
• 2.0V Data retention
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Center power/ground pinout
• Easy memory expansion with CE and OE options
• Functionally equivalent to CY7C1019B
• Available in Pb-free 32-pin 400-Mil wide Molded SOJ and
32-pin TSOP II packages
Logic Block Diagram
CE
WE
OE
Note
1. For guidelines on SRAM system design, please refer to the 'System Design Guidelines' Cypress application note, available on the internet at www.cypress.com.
Cypress Semiconductor Corporation
Document #: 38-05464 Rev. *E
INPUT BUFFER
A 0
A 1
A 2
128K x 8
A 3
A 4
ARRAY
A 5
A 6
A 7
A 8
COLUMN DECODER
198 Champion Court
1-Mbit (128K x 8) Static RAM
Functional Description
The CY7C1019D is a high-performance CMOS static RAM
organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and tri-state drivers. This
device has an automatic power-down feature that significantly
reduces power consumption when deselected. The eight input
and output pins (IO
through IO
0
high-impedance state when:
• Deselected (CE HIGH)
• Outputs are disabled (OE HIGH)
• When the write operation is active (CE LOW, and WE LOW).
Write to the device by taking Chip Enable (CE) and Write
Enable (WE) inputs LOW. Data on the eight IO pins (IO
through IO
) is then written into the location specified on the
7
address pins (A
through A
0
16
Read from the device by taking Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH.
Under these conditions, the contents of the memory location
specified by the address pins appears on the IO pins.
POWER
DOWN
,
San Jose
CA 95134-1709
CY7C1019D
[1]
) are placed in a
7
).
IO 0
IO 1
IO 2
IO 3
IO 4
IO 5
IO 6
IO 7
408-943-2600
Revised February 22, 2007
0
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Summary of Contents for Cypress Semiconductor CY7C1019D

  • Page 1 Document #: 38-05464 Rev. *E 1-Mbit (128K x 8) Static RAM Functional Description The CY7C1019D is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers.
  • Page 2: Pin Configuration

    Pin Configuration Selection Guide Maximum Access Time Maximum Operating Current Maximum Standby Current Document #: 38-05464 Rev. *E SOJ/TSOPII Top View –10 (Industrial) CY7C1019D Unit Page 2 of 11 [+] Feedback...
  • Page 3: Maximum Ratings

    < V , f = f Max V , CE > V – 0.3V, > V – 0.3V, or V < 0.3V, f = 0 CY7C1019D Ambient Speed Temperature 5V ± 0.5V –40°C to +85°C 10 ns –10 (Industrial) Unit + 0.5...
  • Page 4 3.0V 30 pF* ≤ 3 ns Rise Time: High-Z characteristics: R1 480Ω OUTPUT 5 pF 255Ω INCLUDING JIG AND SCOPE CY7C1019D Unit 400-Mil TSOP II Unit Wide SOJ °C/W 56.29 62.22 °C/W 38.14 21.43 ALL INPUT PULSES ≤...
  • Page 5: Switching Characteristics

    , and t HZCE LZCE HZOE LZOE HZWE and t HZWE CY7C1019D –10 (Industrial) Unit µs ” on page 4. Transition is measured when the outputs enter a is less than t for any given device. LZWE...
  • Page 6 DATA RETENTION MODE 4.5V > [13, 14] DATA VALID > 50 µs or stable at V > 50 µs. to V CC(min) CC(min) CY7C1019D Unit – 0.3V, 4.5V DATA VALID HZOE HZCE HIGH IMPEDANCE Page 6 of 11 [+] Feedback...
  • Page 7 17. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. 18. During this period the IOs are in the output state and input signals should not be applied. Document #: 38-05464 Rev. *E DATA VALID [16, 17] DATA VALID CY7C1019D Page 7 of 11 [+] Feedback...
  • Page 8 High Z Data Out Data In High Z Ordering Information Speed Ordering Code (ns) CY7C1019D-10VXI CY7C1019D-10ZSXI Please contact your local Cypress sales representative for availability of these parts. Document #: 38-05464 Rev. *E [11, 17] DATA VALID Mode Power-Down Read...
  • Page 9: Package Diagrams

    CY7C1019D Package Diagrams Figure 1. 32-pin (400-Mil) Molded SOJ (51-85033) 51-85033-*B Document #: 38-05464 Rev. *E Page 9 of 11 [+] Feedback...
  • Page 10 CY7C1019D Package Diagrams (continued) Figure 2. 32-pin Thin Small Outline Package Type II (51-85095) 51-85095-** All product or company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05464 Rev. *E Page 10 of 11 ©...
  • Page 11 Document History Page Document Title: CY7C1019D, 1-Mbit (128K x 8) Static RAM Document Number: 38-05464 REV. ECN NO. Issue Date 201560 See ECN 233715 See ECN 262950 See ECN 307598 See ECN 520647 See ECN 802877 See ECN Document #: 38-05464 Rev. *E Orig.

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