Cypress Semiconductor CY7C1019CV33 Specification Sheet

128k x 8 static ram

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Features
• Pin and function compatible with CY7C1019BV33
• High speed
— t
= 10 ns
AA
• CMOS for optimum speed/power
• Data retention at 2.0V
• Center power/ground pinout
• Automatic power-down when deselected
• Easy memory expansion with CE and OE options
• Available in Pb-free and non Pb-free 48-ball VFBGA,
32-pin TSOP II and 400-mil SOJ package
Functional Description
The CY7C1019CV33 is a high-performance CMOS static
RAM organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and tri-state drivers. This
Logic Block Diagram
INPUT BUFFER
A
0
A
1
A
2
A
3
A
4
128K x 8
A
5
ARRAY
A
6
A
7
A
8
COLUMN
CE
DECODER
WE
OE
Cypress Semiconductor Corporation
Document #: 38-05130 Rev. *F
device has an automatic power-down feature that significantly
reduces power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1019CV33 is available in Standard 48-ball FBGA,
32-pin TSOP II and 400-mil-wide SOJ packages
I/O
I/O
I/O
I/O
I/O
I/O
I/O
POWER
DOWN
I/O
198 Champion Court
128K x 8 Static RAM
through I/O
) is then written into the location
0
7
0
Pin Configuration
SOJ/TSOP II
Top View
A
1
0
A
2
1
A
3
2
A
4
3
0
CE
5
I/O
1
6
0
I/O
7
1
2
V
8
CC
V
9
SS
3
I/O
10
2
I/O
11
3
4
WE
12
A
5
4
13
A
5
14
6
A
15
6
A
16
7
7
,
San Jose
CA 95134-1709
CY7C1019CV33
through A
).
0
16
through I/O
) are placed in a
7
32
A
16
31
A
15
30
A
14
29
A
13
28
OE
27
I/O
7
26
I/O
6
25
V
SS
24
V
CC
23
I/O
5
22
I/O
4
A
21
12
A
20
11
A
19
10
A
18
9
17
A
8
408-943-2600
Revised August 3, 2006
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Summary of Contents for Cypress Semiconductor CY7C1019CV33

  • Page 1 (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1019CV33 is available in Standard 48-ball FBGA, 32-pin TSOP II and 400-mil-wide SOJ packages •...
  • Page 2: Pin Configuration

    Pin Configuration Selection Guide Maximum Access Time Maximum Operating Current Maximum Standby Current Note: 1. NC pins are not connected on the die. Document #: 38-05130 Rev. *F 48-ball VFBGA (Top View) CY7C1019CV33 Unit Page 2 of 10 [+] Feedback...
  • Page 3 , f = f – 0.3V, > V – 0.3V, < 0.3V, f = 0 Test Conditions = 25°C, f = 1 MHz, = 5.0V CY7C1019CV33 Ambient Temperature 3.3V ± 10% 0°C to +70°C 3.3V ± 10% –40°C to +85°C –12 –15...
  • Page 4 Max. Min. is less than t is less than t , and t HZCE LZCE HZOE LZOE and t HZWE CY7C1019CV33 High-Z characteristics: R 317Ω 3.3V OUTPUT 5 pF Max. Min. Max. Unit is less than t for any given device.
  • Page 5 14. Data I/O is high impedance if OE = V 15. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05130 Rev. *F DATA VALID DATA VALID CY7C1019CV33 DATA VALID HZOE HZCE HIGH...
  • Page 6 16. During this period the I/Os are in the output state and input signals should not be applied. Document #: 38-05130 Rev. *F [14, 15] DATA VALID [15] DATA VALID Mode Power-Down Read Write Selected, Outputs Disabled CY7C1019CV33 LZWE Power Standby (I Active (I Active (I Active (I Page 6 of 10 [+] Feedback...
  • Page 7: Ordering Information

    Ordering Information Speed (ns) Ordering Code CY7C1019CV33-10VC CY7C1019CV33-10ZXC CY7C1019CV33-10ZXI CY7C1019CV33-12VC CY7C1019CV33-12ZC CY7C1019CV33-12ZXC CY7C1019CV33-12VI CY7C1019CV33-12BVXI CY7C1019CV33-15VC CY7C1019CV33-15VXC CY7C1019CV33-15ZXC CY7C1019CV33-15ZXI Package Diagrams Document #: 38-05130 Rev. *F Package Diagram Package Type 51-85033 32-pin 400-Mil Molded SOJ 51-85095 32-pin TSOP II (Pb-Free) 32-pin TSOP II (Pb-Free)
  • Page 8 CY7C1019CV33 Package Diagrams (continued) 32-pin TSOP II (51-85095) 51-85095-** Document #: 38-05130 Rev. *F Page 8 of 10 [+] Feedback...
  • Page 9 The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. 48-ball VFBGA (6 x 8 x 1 mm) (51-85150) CY7C1019CV33 BOTTOM VIEW A1 CORNER Ø0.05 M C...
  • Page 10 Document History Page Document Title: CY7C1019CV33 128K x 8 Static RAM Document Number: 38-05130 Issue REV. ECN NO. Date 109245 12/16/01 113431 04/10/02 115047 08/01/02 119796 10/11/02 123030 12/17/02 419983 See ECN 493543 See ECN Document #: 38-05130 Rev. *F Orig.

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