Cypress Semiconductor CY7C1007B Specification Sheet

1m x 1 static ram

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07B
Features
• High speed
— t
= 12 ns
AA
• CMOS for optimum speed/power
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
Functional Description
The CY7C107B and CY7C1007B are high-performance
CMOS static RAMs organized as 1,048,576 words by 1 bit.
Easy memory expansion is provided by an active LOW Chip
Enable (CE) and three-state drivers. These devices have an
automatic power-down feature that reduces power consump-
tion by more than 65% when deselected.
Logic Block Diagram
INPUT BUFFER
A
0
A
1
A
2
A
3
A
512x2048
4
A
5
A
6
A
7
A
8
COLUMN
DECODER
Selection Guide
Maximum Access Time (ns)
Maximum Operating
Current (mA)
Maximum CMOS Standby
Current SB2 (mA)
Cypress Semiconductor Corporation
Document #: 38-05030 Rev. **
ARRA Y
POWER
DOWN
7C107B-12
7C1007B-12
12
90
2
3901 North First Street
Writing to the devices is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the input pin
(D
) is written into the memory location specified on the ad-
IN
dress pins (A
through A
0
Reading from the devices is accomplished by taking Chip En-
able (CE) LOW while Write Enable (WE) remains HIGH. Under
these conditions, the contents of the memory location speci-
fied by the address pins will appear on the data output (D
pin.
The output pin (D
when the device is deselected (CE HIGH) or during a write
operation (CE and WE LOW).
The CY7C107B is available in a standard 400-mil-wide SOJ;
the CY7C1007B is available in a standard 300-mil-wide SOJ.
D
IN
D
OUT
CE
WE
107B-1
7C107B-15
7C107B-20
7C1007B-15
7C1007B-20
15
20
80
75
2
2
San Jose
CY7C107B
CY7C1007B
1M x 1 Static RAM
).
19
) is placed in a high-impedance state
OUT
Pin Configuration
SOJ
Top View
A
28
V
1
10
CC
A
27
2
A
11
9
A
3
26
A
12
8
A
4
25
A
13
7
24
A
A
5
14
6
23
A
A
6
15
5
22
NC
7
A
4
21
A
8
NC
16
A
20
9
A
17
3
A
19
10
A
18
2
A
18
A
11
19
1
A
D
17
12
OUT
0
13
16
D
WE
IN
15
GND
14
CE
107B-2
7C107B-25
7C107B-35
7C1007B-25
7C1007B-35
25
70
2
CA 95134
408-943-2600
Revised September 7, 2001
)
OUT
35
60
2
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Summary of Contents for Cypress Semiconductor CY7C1007B

  • Page 1 The output pin (D when the device is deselected (CE HIGH) or during a write operation (CE and WE LOW). The CY7C107B is available in a standard 400-mil-wide SOJ; the CY7C1007B is available in a standard 300-mil-wide SOJ. POWER DOWN 107B-1...
  • Page 2: Maximum Ratings

    = 0 mA, = 1/t , CE > V >V or V < V – 0.3V, > V – 0.3V or < 0.3V, f = 0 CY7C107B CY7C1007B Ambient Temperature 0°C to +70°C 40°C to +85°C 7C107B-15 7C107B-20 7C1007B-15 7C1007B-20 Min. Max.
  • Page 3 Max. V CE > V – 0.3V, > V – 0.3V or < 0.3V, f = 0 Test Conditions = 25 C, f = 1 MHz, = 5.0V CY7C107B CY7C1007B 7C107B-35 7C1007B-35 Max. Min. Max. Unit + 0.3 + 0.3 Max.
  • Page 4 Max. Min. Max. Min. is less than t and t is less than t for any given device. HZCE LZCE HZWE LZWE CY7C107B CY7C1007B ALL INPUT PULSES 3 ns 3 ns 107-4 7C107B-25 7C107B-35 7C1007B-25 7C1007B-35 Max. Min. Max. Min.
  • Page 5 10. Device is continuously selected, CE = V 11. WE is HIGH for read cycle. 12. Address valid prior to or coincident with CE transition LOW. Document #: 38-05030 Rev. ** DATA VALID DATA VALID CY7C107B CY7C1007B DATA VALID 107-6 HZCE HIGH IMPEDANCE 107-7...
  • Page 6 CY7C107B CY7C1007B Switching Waveforms (continued) [13] Write Cycle No. 2 (WE Controlled) ADDRESS DATA IN DATA VALID HZWE LZWE HIGH IMPEDANCE DATA OUT DATA UNDEFINED 107-9 Note: 13. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
  • Page 7: Truth Table

    Truth Table High Z Data Out High Z Ordering Information Speed (ns) Ordering Code CY7C107B-12VC CY7C1007B-12VC CY7C107B-15VC CY7C1007B-15VC CY7C107B-15VI CY7C1007B-15VI CY7C107B-20VC CY7C1007B-20VC CY7C107B-25VC CY7C1007B-25VC Contact factory for “L” version availability. Package Diagrams Document #: 38-05030 Rev. ** Mode Power-Down Standby (I...
  • Page 8 CY7C107B CY7C1007B 28-Lead (300-Mil) Molded SOJ V21 Document #: 38-05030 Rev. ** Page 8 of 9 © Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product.
  • Page 9 Document Title: CY7C107B/CY7C1007B 1M x 1 Static RAM Document Number: 38-05030 Issue Orig. of REV. ECN NO. Date Change 109950 12/02/01 Document #: 38-05030 Rev. ** Description of Change Change from Spec number: 38-01116 to 38-05030 CY7C107B CY7C1007B Page 9 of 9...

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