Texas Instruments LMKDB1204 User Manual

Texas Instruments LMKDB1204 User Manual

Evaluation module

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EVM User's Guide: LMKDB1204EVM
LMKDB1204 Evaluation Module
Description
The LMKDB1204 evaluation module (EVM) is
designed to provide a quick setup to evaluate the
LMKDB1204 LP-HCSL buffer that supports PCIe Gen
1 to Gen 6. The printed circuit board (PCB) contains
several jumpers and a USB connection to enable
the LMKDB1204 with desired user programming
and setup. The evaluation module provides flexibility
for compliance testing, system prototyping, and
performance evaluation of the LMKDB1204 device.
SNAU307A – MAY 2024 – REVISED MAY 2024
Submit Document Feedback
Features
PCIe Gen 1 to Gen 6
External and USB power supply options
Programmability through
graphical user interface (GUI)
Applications
High performance computing
Server motherboard
NIC/SmartNIC
Hardware accelerator
LMKDB1204EVM
Copyright © 2024 Texas Instruments Incorporated
Description
TICS Pro Software GUI
LMKDB1204 Evaluation Module
1

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Summary of Contents for Texas Instruments LMKDB1204

  • Page 1 PCIe Gen 1 to Gen 6 designed to provide a quick setup to evaluate the • External and USB power supply options LMKDB1204 LP-HCSL buffer that supports PCIe Gen • Programmability through TICS Pro Software GUI 1 to Gen 6. The printed circuit board (PCB) contains...
  • Page 2: Kit Contents

    LP-HCSL 1.4 Device Information The LMKDB1204 is a high performance LP-HCSL buffer that supports PCIe Gen 1 to Gen 6. LMKDB1204 has extremely low additive jitter, fail safe inputs, flexible power-up sequence, individual output enable pins, loss of input signal detection, and SMBus interface. The EVM has integrated LDOs for excellent power supply noise suppression with an operating supply voltage of 3.3V.
  • Page 3: Hardware Setup

    1. If not already installed, then install TICS Pro software from TI website: TICS Pro Software GUI. 2. Start TICS Pro software. 3. Select the LMKDB1204 profile from Select Device → Clock Distribution with Divider → LMKDB1204. 4. Confirm communication with the board: a. Click USB Communication from the menu bar.
  • Page 4: Evm Measurements

    Figure 2-2. Communication Setup 2.2.2 Power Up Sequence By default, the LMKDB1204 and the GUI are started with the default configuration. When using the on-board USB supply option, the following steps can be followed to avoid any improper power up sequence issue when plugging in the USB cable to the EVM.
  • Page 5: Evm Configuration

    3.1 Device Operation Modes The LMKDB1204 can be configured to start up in one of two modes during power-on/reset (POR). SMB_EN pin determines the mode of operation during power supply ramp up. Below are both of the modes for the device: 1.
  • Page 6 3.2.2 Logic Input and Outputs The logic input and output pins on LMKDB1204 provides option for selecting different device modes, input clock selection, output enable / disable control, loss of signal (LOS) detection, and output impedance selection. The following section describes the function of different input and output logic pins. Voltage levels for input pins can...
  • Page 7: Clock Outputs

    Internal termination Enabled. 3.2.4 Clock Outputs LMKDB1204 has four differential clock outputs (CLK[0:3]_P/N). All the outputs are DC coupled with a capacitive load of 2pF. WARNING DC-coupled clocks must not be directly connected to RF equipment which cannot accept DC voltages greater than 0V, such as spectrum analyzers and phase noise analyzers.
  • Page 8 Hardware www.ti.com 3.2.5 Status Outputs, LEDs, and Test Points LMKDB1204EVM have status output signal from LMKDB1204, LEDs, and test points to monitor signal and supply voltage on the board. Table 3-10 summarizes all the status signals and test points on the board.
  • Page 9 4 Software 4.1 TICS Pro LMKDB1204 Software LMKDB1204 TICS Pro GUI provides full functionality to interact with the device through SMBus and OE pin options. TI recommends to use this GUI interface while evaluating LMKDB1204EVM to fully utilize all functionalities. The GUI interface consists of User Controls and Raw Register page to write directly into each register bit or field values.
  • Page 10 Automatic output disable (AOD) can be enabled or disabled using this control for either input. AOD is enabled by default on both inputs on the LMKDB1204. AOD disables the outputs when there is a loss of signal (LOS) detected on the input. When AOD is disabled, outputs follow the input clock in DC state.
  • Page 11 Low (default) LMKDB1204 has SMBus inactive. Setting of SMB_EN pin can only be set at power-up. LMKDB1204 has SMBUS active. Setting of SMB_EN pin can only be set at power-up. On-board jumper headers on High JP4 and JP5 need to be removed for proper operation.
  • Page 12 4.1.3.1.1 Output Slew Rate Control The LMKDB1204 has 4 registers where 4 different slew rate values can be stored. After storing the desired slew rate values in SLEWRATE_OPT_# registers, 1 of those 4 slew rates can be assigned to each output by using the drop-down menus next to the desired output.
  • Page 13 Other methods like clipping a circuit can be used to get a desired slew rate and square wave form as well outputted from the SMA100B. 2. Output phase noise is measured through a Balun to the differential waveform from the LMKDB1204 into a single-ended waveform for the phase noise analyzer.
  • Page 14 6 Hardware Design Files 6.1 Schematics Figure 6-1. Power Supply (External and USB option) Figure 6-2. LMKDB1204 Device and CLKIN#_P/N Reference LMKDB1204 Evaluation Module SNAU307A – MAY 2024 – REVISED MAY 2024 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated...
  • Page 15 Hardware Design Files Figure 6-3. Clock Outputs CLK0 to CLK3 Figure 6-4. Output Enable Pins (OE#) SNAU307A – MAY 2024 – REVISED MAY 2024 LMKDB1204 Evaluation Module Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated...
  • Page 16 Hardware Design Files www.ti.com Figure 6-5. Logic I/O Jumpers Figure 6-6. Status LEDs and Test Points LMKDB1204 Evaluation Module SNAU307A – MAY 2024 – REVISED MAY 2024 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated...
  • Page 17 Hardware Design Files Figure 6-7. USB Schematic SNAU307A – MAY 2024 – REVISED MAY 2024 LMKDB1204 Evaluation Module Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated...
  • Page 18: Pcb Layouts

    Hardware Design Files www.ti.com 6.2 PCB Layouts Figure 6-8. Layer Stackup Figure 6-9. Top Layer (CLKIN / CLKOUT Signals) LMKDB1204 Evaluation Module SNAU307A – MAY 2024 – REVISED MAY 2024 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated...
  • Page 19 Hardware Design Files Figure 6-10. Bottom Layer Figure 6-11. Signal 1 Layer SNAU307A – MAY 2024 – REVISED MAY 2024 LMKDB1204 Evaluation Module Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated...
  • Page 20 Hardware Design Files www.ti.com Figure 6-12. PWR Layer Figure 6-13. GND 1 Layer LMKDB1204 Evaluation Module SNAU307A – MAY 2024 – REVISED MAY 2024 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated...
  • Page 21 Hardware Design Files Figure 6-14. GND 2 Layer SNAU307A – MAY 2024 – REVISED MAY 2024 LMKDB1204 Evaluation Module Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated...
  • Page 22 J1, J2, J3, J4, J5, J6, CONN SMA JACK STR EDGE MNT CONN_JACK CON-SMA-EDGE-S RF Solutions Ltd. J7, J8, J9, J10, J11, J12, J19 LMKDB1204 Evaluation Module SNAU307A – MAY 2024 – REVISED MAY 2024 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated...
  • Page 23 RES, 100 k, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 CRCW0603100KJNEA Vishay-Dale 0603 110k RES, 110 k, 1%, 0.25 W, 1206 1206 RC1206FR-07110KL Yageo America SNAU307A – MAY 2024 – REVISED MAY 2024 LMKDB1204 Evaluation Module Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated...
  • Page 24 500mA, Low IQ, Small Size, Low Dropout DQN0004A TLV75533PDQNR Texas Instruments Regulator, DQN0004A (X2SON-4) Crystal, 24.000MHz, 20pF, SMD Crystal, 11.4x4.3x3.8mm ECS-240-20-5PX-TR ECS Inc. LMKDB1204 Evaluation Module SNAU307A – MAY 2024 – REVISED MAY 2024 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated...
  • Page 25: Compliance Information

    8.1 Trademarks All trademarks are the property of their respective owners. 9 References For additional information on LMKDB1204, refer to LMKDB1120/1108/1104/1102/1204/1202 PCIe Gen 1 to Gen 6 Ultra Low Jitter 1:20, 1:8, 1:4, 1:2, 2:4, 2:2 LP-HCSL Clock Buffer and Clock MUX.
  • Page 26 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
  • Page 27 www.ti.com Regulatory Notices: 3.1 United States 3.1.1 Notice applicable to EVMs not FCC-Approved: FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product.
  • Page 28 www.ti.com Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à...
  • Page 29 www.ti.com EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices.
  • Page 30 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2023, Texas Instruments Incorporated...
  • Page 31 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2024, Texas Instruments Incorporated...

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