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LMK04826 and LMK04828 User's Guide
This user's guide describes how to set up and operate the LMK04826/8 evaluation module (EVM). The
LMK04826/8 is the industry's highest performance clock conditioner with JEDEC JESD204B support.
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SNAU145B - MAY 2013 - Revised March 2018
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Copyright © 2013-2018, Texas Instruments Incorporated
SNAU145B - MAY 2013 - Revised March 2018
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LMK04826 and LMK04828 User's Guide
User's Guide
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Summary of Contents for Texas Instruments LMK04826
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Page 1: Table Of Contents
SNAU145B – MAY 2013 – Revised March 2018 LMK04826 and LMK04828 User’s Guide This user’s guide describes how to set up and operate the LMK04826/8 evaluation module (EVM). The LMK04826/8 is the industry’s highest performance clock conditioner with JEDEC JESD204B support. -
Page 2: Evaluation Board Kit Contents
Table 1. EVM Contents SV600788 -002 -003 Evaluation Board (1) LMK04828B Evaluation Board (1) LMK04826B Evaluation Board USB Communications (1) USB2ANY LMK04826 and LMK04828 User’s Guide SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 3: Quick Start
With PCB change, can be used for reference input for single PLL mode. Figure 1. Quick Start Diagram SNAU145B – MAY 2013 – Revised March 2018 LMK04826 and LMK04828 User’s Guide Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 4: Clkout Page Description Diagram
5. DCLKX_HS: Set half step for this divider. #12 must be Divider+DCC+HS. 6. DCLKX_DDLY_PD: If clear, the digital delay value is assured when a SYNC occurs. 7. DCLKoutX_DDLY_CNTL/CNTH: for controlling the digital delay value. LMK04826 and LMK04828 User’s Guide SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback... - Page 5 7. Set SYSREF_MUX = 3 (SYSREF Continuous). 8. Ensure SYSREF_CLR = 0 (On the right side, in the grey Other SYNC Controls box). SNAU145B – MAY 2013 – Revised March 2018 LMK04826 and LMK04828 User’s Guide Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
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Page 6: Continuous Sysref Output
(SYSREF) at 24.475 MHz. Figure 5 shows the configuration of the LMK0482xB outputs. Figure 3. Continuous SYSREF Output LMK04826 and LMK04828 User’s Guide SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 7: Pulsed Sysref Output
11. Ensure SYSREF_CLR = 0 (On the right side, in the grey Other SYNC Controls box). Figure 4. Pulsed SYSREF Output SNAU145B – MAY 2013 – Revised March 2018 LMK04826 and LMK04828 User’s Guide Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 8: Clock Outputs Page Setup For Sysref Output On Sdclkout7
Quick Start www.ti.com Figure 5. Clock Outputs Page Setup for SYSREF Output on SDCLKout7 LMK04826 and LMK04828 User’s Guide SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 9: Pll Loop Filters And Loop Parameters
PLL Loop Bandwidth is a function of Kφ, Kvco, N as well as loop components. Changing Kφ and N will change the loop bandwidth. SNAU145B – MAY 2013 – Revised March 2018 LMK04826 and LMK04828 User’s Guide Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 10: Default Tics Pro Modes For The Lmk0482X
Dual PLL, Internal VCO 122.88 MHz 122.88 MHz 122.88 MHz Figure 6. Selecting a Default Mode for the LMK04828 Device LMK04826 and LMK04828 User’s Guide SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 11: Using Tics Pro To Program The Lmk0482X
Start TICS Pro Application Click “Start” → “Programs” → “Texas Instruments” → “TICS Pro”. The TICS Pro program is installed by default to the Texas Instruments application group. Select Device Click “Select Device” → “Clock Generator/ Jitter Cleaner (Dual Loop)” → “LMK0482x” → “LMK04828B”... -
Page 12: Selecting The Lmk04828B
It is possible to disable this functionality by ensuring there is no checkmark by the “Options” → “AutoUpdate”. Figure 8. Loading the Device LMK04826 and LMK04828 User’s Guide SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback... - Page 13 “Ctrl+L” to load the device at least once after starting TICS Pro, restoring a mode, or restoring a saved setup using the File menu. SNAU145B – MAY 2013 – Revised March 2018 LMK04826 and LMK04828 User’s Guide Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
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Page 14: Setting The Default Mode For Lmk04828
After a default mode is restored and loaded, LED D4, and D5 must illuminate when PLL1 and PLL2 are locked to the reference clock applied to CLKin1. This assumes PLL1_LD_MUX = PLL1_DLD, PLL2_LD_MUX = PLL2_DLD and PLLX_LD_TYPE = Output (Push-Pull). LMK04826 and LMK04828 User’s Guide SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback... -
Page 15: Setting Digital Delay, Clock Divider, Analog Delay And Output Format
TI’s Clock Design Tool can be used to calculate divider values to achieve desired clock output frequencies. See: http://www.ti.com/tool/clockdesigntool SNAU145B – MAY 2013 – Revised March 2018 LMK04826 and LMK04828 User’s Guide Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 16: Evaluation Board Inputs And Outputs
Input The VccVCXO/Aux input can power these circuits directly or supply the on-board LDO regulators. 0 Ω resistor options provide flexibility to route power. LMK04826 and LMK04828 User’s Guide SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback... - Page 17 The status output signal for the Status_LD1 pin can be selected on the User Status_LD2 Controls page through the PLL2_LD_MUX control. SNAU145B – MAY 2013 – Revised March 2018 LMK04826 and LMK04828 User’s Guide Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
- Page 18 A SYNC event can also be programmed by toggling the SYNC_POL bit in the User Controls page in TICS Pro. Test point: CMOS, Programmable status I/O pin. RESET_TP Input/Output LMK04826 and LMK04828 User’s Guide SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
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Page 19: Recommended Test Equipment
50-Ω cables to minimize external sources of skew or other errors/distortion that may be introduced if using oscilloscope probes. SNAU145B – MAY 2013 – Revised March 2018 LMK04826 and LMK04828 User’s Guide Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 20: Appendix Atics Pro Usage
USB2ANY devices to be selected. Pressing the identify button will identify which USB2ANY is currently selected. Devices used by other instances of TICS Pro won’t display in this list. TICS Pro Usage SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 21: Tics Pro - User Controls Page
The User Controls page has controls not included on one of the later discussed dedicated pages. Figure 11. TICS Pro - User Controls Page SNAU145B – MAY 2013 – Revised March 2018 TICS Pro Usage Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 22: Tics Pro - Raw Registers Page
Figure 12. TICS Pro - Raw Registers Page TICS Pro Usage SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 23: Tics Pro - Set Modes Page
LMK0482x modes of operation. Figure 13. TICS Pro - Set Modes Page SNAU145B – MAY 2013 – Revised March 2018 TICS Pro Usage Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 24: Tics Pro - Clkinx Control Page
“Independent” to allow the OSCin frequency to be unlinked from the external VCXO frequency. Figure 14. TICS Pro - CLKinX Control Page TICS Pro Usage SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 25: Tics Pro - Sync / Sysref Page
(0x01) Conditional Low, keeping the SYSREF_CLR = 1 during transition will prevent glitch pulses from the SYSREF output. Figure 15. TICS Pro - SYNC / SYSREF Page SNAU145B – MAY 2013 – Revised March 2018 TICS Pro Usage Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 26: Tics Pro - Clock Outputs Page
CLKoutY (odd clock), X for controls impacting only CLKoutX and Y for controls impacting only CLKoutY. Figure 16. TICS Pro - Clock Outputs Page TICS Pro Usage SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 27: Tics Pro - Other Page
_MUX field which, when set for output, controls what the pin will output. Figure 17. TICS Pro - Other Page SNAU145B – MAY 2013 – Revised March 2018 TICS Pro Usage Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 28: Tics Pro - Burst Page
The Burst page allows the user to program sequences of register programming or pin control. Figure 18. TICS Pro - Burst Page TICS Pro Usage SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 29: Appendix B Typical Phase Noise Performance Plots
122.88 MHz PLL2 phase detector frequency 122.88 MHz PLL2 Charge Pump Gain 3200 µA PLL2 REF2X mode Enabled SNAU145B – MAY 2013 – Revised March 2018 Typical Phase Noise Performance Plots Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 30: Crystek Cvhd-950-122.88 Mhz Vcxo Phase Noise At 122.88 Mhz
SDCLKout pairs. Below is a phase noise measurement of DCLKout2 (best phase noise clock output) using both a balun and single ended. Typical Phase Noise Performance Plots SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... -
Page 31: Lmk04826 Dclkout2, Vco0, 245.76 Mhz, Div8, Lvpecl20 /W 240-Ω Emitter Resistor, Dclkoutx_Mux=Divider, Idl=1, Odl=0, Balun = Prodyn Bib-100G
Clock Outputs (DCLKout and SDCLKout) www.ti.com Figure 20. LMK04826 DCLKout2, VCO0, 245.76 MHz, Div8, LVPECL20 /w 240-Ω Emitter Resistor, DCLKoutX_MUX=Divider, IDL=1, ODL=0, Balun = Prodyn BIB-100G SNAU145B – MAY 2013 – Revised March 2018 Typical Phase Noise Performance Plots Submit Documentation Feedback... -
Page 32: Lmk04826 Dclkout2, Vco0, 245.76 Mhz, Div8, Lvpecl20 /W 240-Ω Emitter Resistor, Dclkoutx_Mux=Divider, Idl=1, Odl=0, Single Ended
Clock Outputs (DCLKout and SDCLKout) www.ti.com Figure 21. LMK04826 DCLKout2, VCO0, 245.76 MHz, Div8, LVPECL20 /w 240-Ω Emitter Resistor, DCLKoutX_MUX=Divider, IDL=1, ODL=0, Single Ended Typical Phase Noise Performance Plots SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback... -
Page 33: Lmk04826 Dclkout2, Vco1, 245.76 Mhz, Div10, Lvpecl20 /W 240 Ohm Emitter Resistor, Dclkoutx_Mux=Divider, Idl=1, Odl=0, Balun = Prodyn Bib-100G
Clock Outputs (DCLKout and SDCLKout) www.ti.com Figure 22. LMK04826 DCLKout2, VCO1, 245.76 MHz, Div10, LVPECL20 /w 240 ohm emitter resistor, DCLKoutX_MUX=Divider, IDL=1, ODL=0, Balun = Prodyn BIB-100G SNAU145B – MAY 2013 – Revised March 2018 Typical Phase Noise Performance Plots Submit Documentation Feedback Copyright ©... -
Page 34: Lmk04826 Dclkout2, Vco1, 245.76 Mhz, Div10 , Lvpecl20 /W 240-Ω Emitter Resistor, Dclkoutx_Mux=Divider, Idl=1, Odl=0, Single Ended
Clock Outputs (DCLKout and SDCLKout) www.ti.com Figure 23. LMK04826 DCLKout2, VCO1, 245.76 MHz, Div10 , LVPECL20 /w 240-Ω Emitter Resistor, DCLKoutX_MUX=Divider, IDL=1, ODL=0, Single Ended Typical Phase Noise Performance Plots SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback... - Page 35 Figure 24. LMK04828 DCLKout2, VCO0, 245.76 MHz, Div10, LVPECL20 /w 240-Ω Emitter Resistor, DCLKoutX_MUX=Divider, IDL=1, ODL=0, Balun = ADT2-1T SNAU145B – MAY 2013 – Revised March 2018 Typical Phase Noise Performance Plots Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
- Page 36 Figure 25. LMK04828 DCLKout2, VCO0, 245.76 MHz, Div10, LVPECL20 /w 240-Ω Emitter Resistor, DCLKoutX_MUX=Divider, IDL=1, ODL=0, Single Ended Typical Phase Noise Performance Plots SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
- Page 37 Figure 26. LMK04828 DCLKout2, VCO1, 245.76 MHz, Div12, LVPECL20 /w 240-Ω Emitter Resistor, DCLKoutX_MUX=Divider, IDL=1, ODL=0, Balun = ADT2-1T SNAU145B – MAY 2013 – Revised March 2018 Typical Phase Noise Performance Plots Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
- Page 38 Figure 27. LMK04828 DCLKout2, VCO1, 245.76 MHz, Div12, LVPECL20 /w 240-Ω Emitter Resistor, DCLKoutX_MUX=Divider, IDL=1, ODL=0, Single Ended Typical Phase Noise Performance Plots SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
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Page 39: Appendix C Schematics
Appendix C SNAU145B – MAY 2013 – Revised March 2018 Schematics SNAU145B – MAY 2013 – Revised March 2018 Schematics Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... - Page 40 0.47µF 142-0711-201 C360 for power. 0.47µF LP5900SD-3.3/NOPB LP5900 Component values C359 = 0.47 uF C360 = 0.47 uF R369 = 51 k Schematics SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
- Page 41 FBCLKin/CLKin1 Impedance Matching and Attenuation Vcc_VCXO_LDO Vcc_VCXO_OpAmp 0.1µF VTUNE1_TP VCXO Loop Filter C1_A1 C2_A1 C2pA1 0.1µF 0.68uF 2.7µF LMP7731MF R2_A1 PLL1 Loop Filter SNAU145B – MAY 2013 – Revised March 2018 Schematics Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
- Page 42 PCB Number: SV600788 0.375" Standoff 0.375" Standoff PCB Rev: LOGO 0.375" Standoff 0.375" Standoff Texas Instruments LOGO 0.375" Standoff 0.375" Standoff ESD Susceptible Schematics SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
- Page 43 SDCLKout7_P R200 0.1µF R228 R178 0.1µF R206 142-0701-806 R182 142-0701-806 142-0701-806 SDCLKout13 SDCLKout13* SDCLKout13_1_N SDCLKout13_N 0.1µF 142-0701-806 SDCLKout13 SDCLKout13_1_P SDCLKout13_P 0.1µF 142-0701-806 SNAU145B – MAY 2013 – Revised March 2018 Schematics Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
- Page 44 R199 0.1µF R221 0.1µF R179 R204 R225 142-0701-806 142-0701-806 142-0701-806 DCLKout12 DCLKout12 DCLKout12_1_P DCLKout12_P 0.1µF 142-0701-806 DCLKout12* DCLKout12_1_N DCLKout12_N 0.1µF R237 142-0701-806 Schematics SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
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Page 45: Appendix D Bill Of Materials
CAP, CERM, 2pF, 50V, Kemet C0603C209C5GACTU +/-12.5%, C0G/NP0, 0603 C35, C310, C317, C324, CAP, CERM, 10µF, 10V, Kemet C0805C106K8PACTU C352 +/-10%, X5R, 0805 SNAU145B – MAY 2013 – Revised March 2018 Bill of Materials Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated... - Page 46 R237, R187, R190, R204, R206 R50, R86, R313, R316, RES, 27k ohm, 5%, Vishay-Dale CRCW060327K0JNEA R319, R320, R325, 0.1W, 0603 R384 Bill of Materials SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
- Page 47 LP5900SD-3.3/NOPB Linear Regulator for RF/Analog Circuits Requires No Bypass Capacitor, 6-pin LLP, Pb-Free Connector, TH, SMA Emerson Network Power 142-0701-201 SNAU145B – MAY 2013 – Revised March 2018 Bill of Materials Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
- Page 48 • Deleted Appendices C - E that regarded obsolete pre-release boards with old interfaces......................• Revised formatting for Table 8 Revision History SNAU145B – MAY 2013 – Revised March 2018 Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated...
- Page 49 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
- Page 50 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
- Page 51 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/ /www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 3.4 European Union 3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a low-voltage power-supply network that supplies buildings used for domestic purposes.
- Page 52 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2018, Texas Instruments Incorporated...
- Page 53 IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products;...
- Page 54 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments LMK04828BEVM LMK04826BEVM...
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