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LMK04821EVM User's Guide
These evaluation board instructions describe how to set up and operate the LMK04821EVM evaluation
module (EVM).
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Topic
1
Evaluation Board Kit Contents
2
Quick Start
3
PLL Loop Filters and Loop Parameters
4
Default CodeLoader Modes for the LMK0482x
5
Using CodeLoader to Program the LMK04821
6
Evaluation Board Inputs and Outputs
7
Recommended Test Equipment
8
Appendix A: CodeLoader Usage
9
Appendix B: Typical Phase Noise Performance Plots
10
Appendix C: Schematics
11
Appendix D: Bill of Materials
SNAU168 – August 2014
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User's Guide
SNAU168 – August 2014
LMK04821EVM User's Guide
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Summary of Contents for Texas Instruments LMK04821EVM
- Page 1 User's Guide SNAU168 – August 2014 LMK04821EVM User’s Guide These evaluation board instructions describe how to set up and operate the LMK04821EVM evaluation module (EVM)..........................Topic Page ................Evaluation Board Kit Contents ......................Quick Start ..............PLL Loop Filters and Loop Parameters ............
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Page 2: Evaluation Board Kit Contents
• USB2ANY interface Quick Start The LMK04821EVM allows full verification of the device functionality and performance specifications. To quickly set up and operate the board with basic equipment, refer to the quick start procedure below and test setup shown in Figure 1. - Page 3 These SMAs not used by default. With PCB change, can be used for reference input for single PLL mode. Figure 1. Quick Start Diagram SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 4 On PLL tabs clicking Show Bits will show register info. • On other tabs, pressing the ~ key with a control focused will show a help prompt. LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 5 Blue trace is DCLKout6 at 245.76 MHz and the Green trace is SDCLKout7 (SYSREF) at 24.475 MHz. Figure 5 shows the configuration of the LMK04821 outputs. Figure 3. Continuous SYSREF Output SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 6 9. Generate a SYNC event (i.e. toggle SYNC_POL on/off/on) 10. On SYSREF tab ensure SYSREF_CLR = 0 (SYSREF tab, location: right side, below clock output pic) Figure 4. Pulsed SYSREF Output LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 7 Quick Start www.ti.com Figure 5. Clock Outputs Tab Setup for SYSREF Output on SDCLKout7 SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
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Page 8: Pll Loop Filters And Loop Parameters
1. PLL Loop Bandwidth is a function of Kφ, Kvco, N, as well as loop filter components. Changing Kφ and N will change the loop bandwidth LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... - Page 9 CLKin1 122.88 MHz, OSCin Dual PLL, Internal VCO 122.88 MHz 122.88 MHz 122.88 MHz Figure 6. Selecting a Default Mode for the LMK04828 Device SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
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Page 10: Select Device
CodeLoader, restoring a mode, or restoring a saved setup using the File menu. See CodeLoader 4 instructions located at http://www.ti.com/tool/codeloader/ for more information on Port Setup. This contains information on troubleshooting communications. LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 11: Restoring A Default Mode
After a default mode is restored and loaded, LED D4, and D5 should illuminate when PLL1 and PLL2 are locked to the reference clock applied to CLKin1. This assumes PLL1_LD_MUX = PLL1_DLD, PLL2_LD_MUX = PLL2_DLD and PLLX_LD_TYPE = Output (Push-Pull). SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 12: Enable Clock Outputs
Unless otherwise noted, the connectors described can be assumed to be populated by default. Additionally, some applicable CodeLoader programming controls are noted for convenience. LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... - Page 13 (normal, inverted, inverted, and off/tri-state). Best performance/EMI reduction is achieved by using a complementary output mode like Norm/Inv. It is NOT recommended to use Norm/Norm or Inv/Inv mode. SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 14 Tuning voltage output from the loop filter for PLL2. VTUNE2_TP Input Test points: CMOS, 10-pin header for SPI programming interface and programmable logic I/O pins for SDIO Input/Output the LMK04821. LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 15 A SYNC event can also be programmed by toggling the SYNC_POL_INV bit in the Bits/Pins tab in CodeLoader. Test point: CMOS, Programmable status I/O pin. RESET_TP Input/Output SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
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Page 16: Recommended Test Equipment
50-ohm cables to minimize external sources of skew or other errors/distortion that may be introduced if using oscilloscope probes. LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 17: Port Setup Tab
The Pin Configuration field is hardware dependent and normally does not need to be changed by the user. USB interface should be used for LMK04821. When using USB2ANY Clock Bit, Data Bit, and LE Bit positions have no effect. SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... - Page 18 Left-click/right-click to increase/decrease charge pump gain (50,150, 250, 1550 uA). Charge Pump State PLL1_CP_TRI PLL1 Charge Pump State. Click to toggle between Active and Tri-State. LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 19 Changes made on this tab will be reflected in the Clock Outputs tab. The VCO Frequency should conform to the specified internal VCO frequency range. SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 20 N Counter values (shown in the PLL2 tab), and is given by: PLL2 N Total = PLL2 N Prescaler * PLL2 N Counter LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 21 Appendix A: CodeLoader Usage www.ti.com SYSREF Tab Figure 14. SYSREF Tab The SYSREF tab show the controls for SYSREF functionality as well as Dynamic Digital Delay enable. SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
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Page 22: Bits/Pins Tab
On PLL2, CLKouts, SYSREF, and Other tabs pressing the ` key will provide help. LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 23: Appendix B: Typical Phase Noise Performance Plots
CVHD-950-122.88 Crystek VCXO. Figure 16. Crystek CVHD-950-122.88 MHz VCXO Phase Noise at 122.88 MHz SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... - Page 24 Figure 17. LMK04821 DCLKout2, VCO0, 245.76 MHz, Div8, LVPECL20 /w 240 ohm emitter resistor, DCLKoutX_MUX=Divider, IDL=1, ODL=0, Balun = Prodyn BIB-100G LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 25 LVPECL20 /w 240 ohm emitter resistor, DCLKout2_MUX=Divider, IDL=1, ODL=0, Balun = Prodyn BIB- 100G Figure 19. LMK04821 DCLKout2, VCO1, 245.76 MHz, Div10 , LVPECL20 /w 240 ohm emitter resistor, DCLKoutX_MUX=Divider, IDL=1, ODL=0, Single Ended SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 26 FBCLKin/CLKin1 Impedance Matching and Attenuation Vcc_VCXO_LDO Vcc_VCXO_OpAmp 0.1µF VTUNE1_TP VCXO Loop Filter C1_A1 C2_A1 C2pA1 0.1µF 2.7µF 0.68uF LMP7731MF R2_A1 PLL1 Loop Filter Figure 20. Power Supply LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 27 C360 for power. 0.47µF LP5900SD-3.3/NO PB LP5900 Component values C359 = 0.47 uF C360 = 0.47 uF R369 = 51 k Figure 21. LMK04828B SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 28 SV600788 PCB Rev: 0.375" Standoff 0.375" Standoff LOGO 0.375" Standoff 0.375" Standoff Texas Instruments LOGO 0.375" Standoff 0.375" Standoff ESD Susceptible Figure 22. Digital LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 29 0.1µF R206 142-0701-806 R182 142-0701-806 142-0701-806 SDCLKout13 SDCLKout13* SDCLKout13_1_N SDCLKout13_N 0.1µF 142-0701-806 SDCLKout13 SDCLKout13_1_P SDCLKout13_P 0.1µF 142-0701-806 Figure 23. Clock Outputs 1 of 2 SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 30 R204 R225 142-0701-806 142-0701-806 142-0701-806 DCLKout12 DCLKout12 DCLKout12_1_P DCLKout12_P 0.1µF 142-0701-806 DCLKout12* DCLKout12_1_N DCLKout12_N 0.1µF R237 142-0701-806 Figure 24. Clock Outputs 2 of 2 LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
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Page 31: Appendix D: Bill Of Materials
0603 C340 CAP, CERM, 4.7uF, 10V, +/-10%, X5R, Kemet C0603C475K8PACTU 0603 C350, C351, C359, C360 CAP, CERM, 0.47uF, 16V, +/-10%, X7R, Kemet C0603C474K4RACTU 0603 SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... - Page 32 5V Applications, 8-pin LLP, Pb-Free U303, U305 Ultra Low Noise, 150mA Linear Regulator Texas LP5900SD-3.3/NOPB for RF/Analog Circuits Requires No Bypass Instruments Capacitor, 6-pin LLP, Pb-Free LMK04821EVM User’s Guide SNAU168 – August 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 33 Appendix D: Bill of Materials www.ti.com Table 8. Bill of Materials (continued) Item Designator Description Manufacturer PartNumber Qty. Connector, TH, SMA Emerson 142-0701-201 Network Power SNAU168 – August 2014 LMK04821EVM User’s Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
- Page 34 STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein. Acceptance of the EVM is expressly subject to the following terms and conditions.
- Page 35 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
- Page 36 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page SPACER EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
- Page 37 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated...
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Page 38: Important Notice
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. - Page 39 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments LMK04821EVM...
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