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User's Guide
LMK5B33414EVM User's Guide
The LMK5B33414EVM is an evaluation module for the LMK5B33414 Network Clock Generator and
Synchronizer. The EVM can be used for device evaluation, compliance testing, and system prototyping.
1
Introduction.............................................................................................................................................................................2
Start......................................................................................................................................................................4
Configuration..................................................................................................................................................................6
3.1 Power Supply.....................................................................................................................................................................
3.2 Logic Inputs and Outputs...................................................................................................................................................
3.3 Switching Between I2C and SPI......................................................................................................................................
3.4 Generating SYSREF Request..........................................................................................................................................
3.5 XO Input...........................................................................................................................................................................
Inputs....................................................................................................................................................13
Outputs...................................................................................................................................................................13
3.8 Status Outputs and LEDS................................................................................................................................................
3.9 Requirements for Making Measurements........................................................................................................................
4 EVM Schematics...................................................................................................................................................................
4.1 Power Supply Schematic.................................................................................................................................................
4.2 Alternative Power Supply Schematic...............................................................................................................................
4.3 Power Distribution Schematic..........................................................................................................................................
4.4 LMK5B33414 and Input Reference Inputs IN0 to IN1 Schematic....................................................................................
4.8 XO Schematic..................................................................................................................................................................
4.9 Logic I/O Interfaces Schematic........................................................................................................................................
Schematic.....................................................................................................................................................24
Materials.............................................................................................................................................................25
5.1 Loop Filter and Vibration Nonsensitive Capacitors..........................................................................................................
6.1 Using the Start Page........................................................................................................................................................
6.2 Using the Status Page.....................................................................................................................................................
Page........................................................................................................................................................36
6.4 Using APLL1, APLL2, and APLL3 Pages........................................................................................................................
6.6 Using the Validation Page................................................................................................................................................
Page.......................................................................................................................................................42
6.8 Using the Outputs Page...................................................................................................................................................
Trademarks
All trademarks are the property of their respective owners.
SNAU279 - JULY 2022
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ABSTRACT

Table of Contents

Characteristics..............................................................................................................................15
Schematic........................................................................................................................19
Schematic........................................................................................................................20
Software..................................................................................................................32
Copyright © 2022 Texas Instruments Incorporated
Schematic....................................................................21
LMK5B33414EVM User's Guide
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Summary of Contents for Texas Instruments LMK5B33414EVM

  • Page 1: Table Of Contents

    Table of Contents User’s Guide LMK5B33414EVM User's Guide ABSTRACT The LMK5B33414EVM is an evaluation module for the LMK5B33414 Network Clock Generator and Synchronizer. The EVM can be used for device evaluation, compliance testing, and system prototyping. Table of Contents Introduction.....................................2 2 EVM Quick Start..................................4...
  • Page 2: Introduction

    1 Introduction Overview The LMK5B33414EVM is an evaluation module for the LMK5B33414 Network Clock Generator and Synchronizer. The EVM can be used for device evaluation, compliance testing, and system prototyping. The LMK5B33414 integrates three Analog PLLs (APLL) and three Digital PLLs (DPLL) with programmable loop bandwidth.
  • Page 3 OUT13_N OUT5_N OUT13_P OUT5_P OUT0_P OUT3_P OUT0_N OUT3_N OUT1_N OUT2_N OUT1_P OUT2_P VIN1 VIN2 Figure 1-1. LMK5B33414EVM Default Setting of Jumpers and DIP Switches SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 4: Evm Quick Start

    Be aware that USB2ANY devices connected to the PC but not attached to by a TICS Pro instance may blink at a slow rate of 1 second on, 1 second off, continuously. After LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 5 Wait to confirm the change. It may take some time for the DPLL status bits to reflect lock. Figure 2-2. Read Status Bits Measure Measurements can now be made at the clock outputs. SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 6: Evm Configuration

    R76 is installed by default. Jumper header for I C/SPI interface (MCU to LMK5B33414) SCL or SCK busy indication LED. USB Port for MCU LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 7 OUT12_N OUT4_N OUT13_N OUT5_N OUT13_P OUT5_P OUT0_P OUT3_P OUT0_N OUT3_N OUT1_N OUT2_N OUT1_P OUT2_P VIN1 VIN2 Figure 3-1. Key Components - EVM Top Side SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 8: Power Supply

    Figure 3-2. Default Power Jumper Configuration Figure 3-2 shows the default power jumper locations and settings. Table 3-2 shows the suggested power configurations for the LMK5B33414. LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 9: Logic Inputs And Outputs

    Table 3-3. Device Start-Up Modes GPIO1 INPUT LEVEL START-UP MODE C Mode SPI Mode The input levels on these pins are sampled only during POR. SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 10: Switching Between I2C And Spi

    In SPI mode, GPIO2 must also be configured as STATUS or INT, SPI Readback Data (SDO), Active High, and CMOS to support SPI readback. Figure 3-5. GPIO2 Setting for SPI Mode Figure 3-6. Communication Setup Window (Changing from I2C to SPI) LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 11: Generating Sysref Request

    (meaning > 0.05 and < 0.95). When configuring the LMK5B33414 as a clock generator (DPLL not used), then the XO frequency can have an integer relationship with the APLL output frequency. SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 12 To power down Y1 and use an external XO input, the jumper on JP4 must be removed. Recommended XO frequencies for best device performance are frequencies of 10, 13, 14.4, 19.44, 24, 25, 27, 38.88, and 48 MHz. LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 13: Reference Clock Inputs

    3.8 Status Outputs and LEDS Status outputs signals can be configured on the GPIO0, GPIO1, and GPIO2 pins. The status output types are 3.3-V LVCMOS or NMOS open-drain. SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 14: Requirements For Making Measurements

    EVM Configuration www.ti.com 3.9 Requirements for Making Measurements When performing measurements with the LMK5B33414EVM, the following procedures must be completed: 1. Ensure all required outputs have proper termination components installed to match the desired output types. Figure 3-10 shows the recommended output terminations for each output format.
  • Page 15: Typical Phase Noise Characteristics

    Figure 3-12. APLL3 312.5-MHz Phase Noise Figure 3-13. APLL3 156.25-MHz Phase Noise Performance Performance Figure 3-14. APLL3 125-MHz Phase Noise Figure 3-15. APLL3 100-MHz Phase Noise Performance Performance SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 16: Evm Schematics

    23.2k 10uF GND[CP] 10nF 13.3k LP38798SD-ADJ/NOPB LDO2 R202 IN[CP] OUT[FB] 10uF C155 0.01uF 23.2k 10uF GND[CP] 10nF 13.3k LP38798SD-ADJ/NOPB Figure 4-2. Alternative Power Supply LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 17: Power Distribution Schematic

    0.1uF 10uF 0.1uF FB11 VDD_APLL3 VDD_APLL3 0.1uF 10uF 0.1uF GND TEST POINTS TP19 TP20 TP21 TP22 TP23 TP24 TP25 TP26 Figure 4-3. Power Distribution SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 18: Lmk5B33414 And Input Reference Inputs In0 To In1 Schematic

    ClassName: XO_trace ClassName: XO_trace 142-0701-201 ClassName: XO_trace 100nF 0.047µF 0.1µF TP29 470nF 0.047µF 0.1µF Figure 4-4. LMK5B33414 and Input Reference Inputs IN0 to IN1 LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 19: Clock Outputs Out0 To Out3 Schematic

    0.1uF 49.9 49.9 0.1uF ClassName: OUT_LenMatch1a ClassName: OUT_LenMatch1b R174 49.9 OUT2_N 49.9 ClassName: OUT_LenMatch1a ClassName: OUT_LenMatch1b OUT3_N Figure 4-5. Clock Outputs OUT0 to OUT3 SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 20: Clock Outputs Out4 To Out9 Schematic

    OUT8_A_N SMA_O8_N OUT9_N OUT9_A_N SMA_O9_N R183 0.1uF R117 R184 0.1uF R119 49.9 49.9 49.9 49.9 OUT8_N OUT9_N Figure 4-6. Clock Outputs OUT4 to OUT9 LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 21: Clock Outputs Out10 To Out13 And Clock Inputs In2 And In3 Schematic

    ClassName: OUT_LenMatch2b 0.1uF IN2_N/OUT14_N R143 49.9 49.9 ClassName: OUT_LenMatch2a ClassName: OUT_LenMatch2b IN3_N/OUT15_N Figure 4-7. Clock Outputs OUT10 to OUT13 and Clock Inputs IN2 and IN3 SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 22: Xo Schematic

    Control_Voltage(Vc) ROM9070PA 100pF ClassName: XO_trace R210 VCC_XO_FILT OUTPUT R211 VCC_XO_FILT CLK+ 0.1uF CLK- EN_XO 0.1uF ClassName: XO_trace CDC64XX-2520 ClassName: XO_trace ROX2522S4 Figure 4-8. XO LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 23: Logic I/O Interfaces Schematic

    SW_4SPST VDDGPIO GPIO2=HI Active High LED Yellow BSS138 2.5 mA VDDGPIO TP40 PDN_R LMKPDN U2AGPIO3 0.1uF 1.0k S5 PDN Figure 4-9. Logic I/O Interfaces SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 24: Usb2Any Schematic

    VBUS U2A_3V3 VUSB HTST-115-01-L-DV VUSB VSSU BSS138 AVSS1 AVCC1 AVSS2 DVCC1 DVSS1 DVCC2 DVSS2 C142 C143 C144 0.1uF 0.1uF 0.1uF Figure 4-10. USB MCU LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 25: Evm Bill Of Materials

    CAP, CERM, 30 pF, 100 V, +/- GRM1885C2A300JA01D MuRata 5%, C0G/NP0, 0603 C139 2200pF CAP, CERM, 2200 pF, 50 V, +/- C0603C222K5RACTU Kemet 10%, X7R, 0603 SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 26 Connector, SMA, TH 142-0701-201 Cinch Connectivity Connector, Receptacle, Mini-USB 1734035-2 TE Connectivity Type B, R/A, Top Mount SMT Header, 2.54mm, 15x2, Gold, HTST-115-01-L-DV Samtec LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 27 RES, 51, 5%, 0.0625 W, 0402 RC0402JR-0751RL Yageo America R43, R144, R146 RES, 33, 5%, 0.063 W, AEC- CRCW040233R0JNED Vishay-Dale Q200 Grade 0, 0402 SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 28 TP2, TP5, TP41 Test Point, Miniature, Red, TH 5000 Keystone TP19, TP20, TP21, Test Point, Miniature, Black, TH 5001 Keystone TP22, TP23, TP24, TP25, TP26 LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 29 5%, C0G/NP0, 0603 7.5V Diode, Zener, 7.5 V, 550 mW, 1SMB5922BT3G ON Semiconductor J2, J3, J5 CONN SMA JACK STR EDGE CON-SMA-EDGE-S RF Solutions Ltd. SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 30 Crystal, Sealed Locked 50 MHz, 7X-50.000MBB-T TXC Corporation 15pF, SMD MERCURY+ 38.88MHz OCXO ROM9070PA Rakon CMOS Oscillator 2.7 ~ 5V 4-SMD STANDARD OCXO 10MHz ROX2522S4 Rakon Frequency LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 31: Loop Filter And Vibration Nonsensitive Capacitors

    06035C473JAT2A, 0603 C0805X473G3GEC7800, C0G/NP0, 0805 C0805C473J3GACTU, C0G/NP0, 0805 0.1 µF C0603C104J3RACTU, 0603 GRM31C5C1E104JA01L, C0G/NP0, 1206 TAJR104K020RNJ, Tantalum, 0805 0.47 µF GRM188R71A474KA61D, 0603 F921C474MPA, Tantalum, 0805 SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 32: Appendix A - Tics Pro Lmk5B33414 Software

    Set up the clock input frequencies and the interface type. Cascaded APLLs can also be assigned from this page using the PLL R-divider and phase detector preview to the right. Figure 6-2. Step 1 and 2: XO Input and Clock Inputs LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 33 Set the clock output for ZDM. The PLL will drive the PLL source mux for the selected output set for ZDM. Figure 6-4. Step 4: Zero Delay Mode SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 34 After the output frequency plan is calculated, ensure that a valid XO input is fed into the device so the APLLs can lock and generate the required frequencies. The device will not output any clocks until all enabled APLLs are locked. LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 35: Using The Status Page

    When INT_EN = 1, any live status flag which occurs will latch to the INTR Latched bit columns. These will remain asserted until the Clear Latched Bits button is pressed. This gives additional insight into the behavior of the device. SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 36: Using The Input Page

    Div #1 settings with the new values for FB Config 1. a. Div #2 settings will remain the same as the ones initial copied over in step 1. LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 37 Cascaded configurations can be created using the input page, where the relevant VCO buffers and dividers will automatically be enabled by inferring the state of source selection registers. SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 38: Using Apll1, Apll2, And Apll3

    When the DPLL is not used, the APLLs support an APLL-only mode with a programmable 24-bit denominator. Support for this mode is currently not implemented in the TICS Pro software. LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 39 Figure 6-15 shows the post divider for PLL3. PLL3 supports all outputs of the LMK5B33414. Figure 6-14. PLL2 Post Divider Figure 6-15. PLL3 Dividers SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 40: Using The Dpll1, Dpll2, And Dpll3

    6.5 Using the DPLL1, DPLL2, and DPLL3 Pages The DPLL pages contain many advanced controls that are normally set during the Run Script calculation. Figure 6-16. Primary DPLL Controls LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 41 DPLL numerator. This frequency deviation is shown in the DPLLx_FDEV control. To perform the shift, you must press the increment or decrement button. Figure 6-17. DPLL DCO Controls SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 42: Using The Validation Page

    When using SPI readback on the EVM, GPIO2 must be configured as STATUS or INT… and SDO output. When using the device in I C mode, refer to Section 3.3. Figure 6-19. GPIO Page LMK5B33414EVM User's Guide SNAU279 – JULY 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 43: Using The Outputs Page

    The black box around OUT2 to OUT3, OUT4 to OUT7, and OUT8 to OUT13 signifies that all these outputs should source from the same VCO. Figure 6-20. Outputs Page SNAU279 – JULY 2022 LMK5B33414EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 44 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
  • Page 45 www.ti.com Regulatory Notices: 3.1 United States 3.1.1 Notice applicable to EVMs not FCC-Approved: FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product.
  • Page 46 www.ti.com Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à...
  • Page 47 www.ti.com EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices.
  • Page 48 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2019, Texas Instruments Incorporated...
  • Page 49 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2022, Texas Instruments Incorporated...

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