Omron 3G3MV-P10CDT-E User Manual page 57

Communication, Counter and Pulse
Ladder Diagram
Programming
44
The following table shows the instructions related to high-speed counter
control.
Instruction
(@)CTBL(63) Register target value
comparison table
Register range
comparison table
Register target value
comparison table and
start comparison
Register range
comparison table and
start comparison
(@)INI(61) Start comparison
Stop comparison
Change PV
(@)PRV(62) Read PV
Read status
Read range comparison
result
(@)INT(89) Mask all interrupts
Unmask all interrupts
The following table shows the data areas related to high-speed counter con-
trol.
Word Bits
248 00 to 15
249
00 to 15
252 00
AR11 00 to 07
08
09
Control
Registers target value comparison
table.
Registers range comparison table.
Registers target value comparison table
and starts comparison.
Registers range comparison table and
starts comparison.
Starts comparison with registered
comparison table.
Stops comparison.
Changes the high-speed counter PV.
Reads the high-speed counter PV.
Reads the high-speed counter status.
Reads range comparison result.
Prohibits all interrupts, including
interrupt inputs, interval timer interrupts,
high-speed counters, etc.
Permits all interrupts, including interrupt
inputs, interval timer interrupts,
high-speed counters, etc.
Name
High-speed counter PV
High-speed counter reset
High-speed counter range
comparison results
High-speed counter
comparison
High-speed counter PV
overflow/underflow
SECTION 4
Operation
Contents
Reads high-speed counter
PV.
When this bit turns ON, a
software reset is triggered for
the high-speed counter.
ON: Condition satisfied
OFF: Condition not satisfied
ON: Comparison in progress
OFF: Comparison stopped
ON: Overflow/underflow
OFF: Normal