Warming-Up Function; The Warming-Up Timer For A High Speed Oscillation - Toshiba TXZ+ TMPM4KLFYAUG Reference Manual

1.2.4. Warming-up function

A warming-up function starts the warming-up timer for high speed oscillator automatically to secure the
oscillation stable time when the STOP1 mode is released.
It is also available as a count-up timer which uses the warming-up timer for high speed oscillator to secure the
stability of an external oscillator or an internal oscillator.
This chapter explains the setting method to the register for warming-up timers, and the case where it is used as a
count-up timer. The detailed explanation at the time of STOP1 mode release, refer to "1.3.3.2. Warming-up at the
release of Low Power Consumption mode".

1.2.4.1. The warming-up timer for a high speed oscillation

A 16-bit up-timer is built in as a warming-up timer only for a high speed oscillation. Also when setting it before
changes to the STOP1 mode, calculate with the following formula and set [CGWUPHCR]<WUPT[15:4]> to the
upper 12 bits of the result. Lower 4bits are ignored.
<Formula>
(Using external high speed oscillator)
Warming-up timer setting value (16 bits)
= (warming-up time (s) / clock period (s)) - 16
(Example) When 5 ms of warming-up time is set up with 10 MHz (100 ns of clock periods) of oscillators
Warming-up timer setting value (16 bits)
Since upper 12 bits are used, set the register as follows.
[CGWUPHCR]<WUPT[15:4]> = 0xC34
(Using internal high speed oscillator1)
Warming-up timer setting value (16 bits)
= (warming-up time (s) – 63.3(µs)) / clock period (s) - 41
(Example) When 163.4 µs of warming-up time is set up with 10 MHz (100 ns of clock periods) of oscillators
Warming-up timer setting value (16 bits)
Since upper 12 bits are used, set the register as follows.
[CGWUPHCR]<WUPT[15:4]> = 0x03C
The setting range is 0x03C ≤ <WUPT[15:4]> ≤ 0xFFF, warming-up time is set from 163.4 µs to 6.6194 ms.
Clock Control and Operation Mode
= (5ms / 100ns) - 16
= 50000 - 16
= 49984
= 0xC340
= ((163.4µs – 63.3µs) / 100ns) - 41
= (100.1µs – 100ns) - 41
= 960
= 0x03C0
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TXZ+ Family
TMPM4K Group(2)
2023-12-25
Rev. 3.0