Table of Contents
Advertisement
In case of RESET_N pin input change from "Low" to "High" before "Internal initialization time" elapses, internal
reset signal is released after "Internal initialization time" elapses.
Please goes up a supply voltage into an operating voltage range before "Internal initialization time" elapses. The
CPU operates after internal reset release.
Operating voltage range
LVD Release
Voltage
(V
)
LVL0
PORF release
Voltage
(V
)
PREL
POR release
Voltage
(V
)
PREL
0V
RESET_N pin
LVD reset
Internal reset
Power slope
LVD detection release time(t
Internal initialization time(
Figure 3.3 Reset operation by a RESET_N pin (2)
59 / 68
Clock Control and Operation Mode
DVDD5=DVDD5A=DVDD5B=AVDD5
(V
)
PON
)
VDDT2
t
)
IINIT
TXZ+ Family
TMPM4K Group(2)
DVDD5
CPU Operation start
2023-12-25
Rev. 3.0
Advertisement
Table of Contents
