Block Diagram; Selection Table - Holtek BC68F2130 Manual

BC68F2130/BC68F2140/BC68F2150
Sub-1GHz RF Transmitter Flash MCU with OCDS

Block Diagram

VDD 2.0V ~ 3.6V LDO
V15O 1.5V
VSS V
SS
Reset
Circuit
Interrupt
INT0~
Controller
INT1
Pin-Shared
With Port A
Time Bases
OSC1
OSC2
: Expose Pad : Pin-Shared Node
Note: The figure illustrates the Block Diagram of the device with maximum features, the functional differences
between the devices are provided in the Selection Table.

Selection Table

Most features are common to these devices, the main features distinguishing them are Flash Memory
capacity, I/O count and the package type. The following table summarises the main features of each
device.
Part No.
BC68F2130
BC68F2140
BC68F2150
Part No. Timer Module
10-bit CTM×1
BC68F2130
10-bit PTM×1
10-bit CTM×1
BC68F2140
10-bit PTM×1
10-bit CTM×1
BC68F2150
10-bit PTM×1
Rev. 1.50
V
DD
Domain
IAP
ROM RAM
8K × 16 256 × 8
Stack
LVD
8-Level
Watchdog
LVR
Timer
HT8 MCU Core
SYSCLK
LIRC
HIRC
HXT
Clock System
: 24 Pin Only
V ROM
DD
2.0V~3.6V 2K×16
2.0V~3.6V 4K×16
2.0V~3.6V 8K×16
Integrated RF
Band
315~915MHz OOK/FSK TX
315~915MHz OOK/FSK TX
315~915MHz OOK/FSK TX
7
1.5V
Level Shift
Domain
CTM
Pin-
PTM Shared
Function
I/O
Digital Peripherals
VDDRF
RF Control
PA
VSSRF_PA
RF
Synthesizer
RF Transmitter
RAM I/O Ext. Int.
256×8 8 2
256×8 14 2
256×8 14 2
Time Base Stack
Type
2 8
2 8
2 8
Port A
PA0~PA7
Driver
Port B
PB0~PB5
Driver
V VDDRF
DDRF
V VSSRF
SSRF
EP
RFOUT
VSSRF_PA
LDO
√
√
√
Package
16NSOP-EP
16QFN
24SSOP-EP
24QFN
24SSOP-EP
24QFN
January, 22, 2021