Sharp SF-A55 Service Manual page 29

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Block diagram
TC9192AF (IC9 internal circuit)
Fref
2
Fsig
3
LW
5
RV
11
FGIN
7
(A) Reference clock switch circuit
The clock signal which serves as the reference of the rotation speed (the transport motor rotation signal or the clock signal outputted from the CPU 2
pin) is selected by G/A to be inputted to IC9 2 pin.
(B) PLL circuit
Composed of the IC9 and its peripheral circuits.
The IC9 is the double PLL IC composed of the AFC/APC loop system for controlling the motor and the phase feedback loop system for generating
the reference signal.
The former PLL is composed of speed control utilizing the F-V convertor and phase control utilizing the phase comparator. The latter PLL generates
the output signal for controlling the former PLL, detects the phase difference between the internal oscillator and the reference clock, and generates
pulses in proportion to the positive and negative.
First, the reference clock is inputted to the IC9 2 pin (Fref). While the signal of the sensor (encoder) whose motor speed is to be controlled is
inputted the IC9 7 pin. When the motor speed is high, IC9 8 and 9 pins become LOW. When the motor speed is low, they become HIGH. When both
clocks become of the same phase, the IC9 19 pin (Do) becomes high impedance.
This signal is passed through the low pass filter composed of IC5.1, R3, R93, R137 ∼ R139, and C38 and fedback to IC9 18 pin (VC). R138 and
R139 generate the reference voltage of the operation amplifier IC5.1. +5V is divided to provide 2.5V.
Since the power of IC5.1 is +24V, D6 and ZD8 prevents the output from becoming greater than +5V. Especially D6 operates when the power of +5V
is cut off.
R86 and C56 are for internal oscillation.
DO
VC
RH
RL
19
18
17
15
PD
Phase
comparison
unit
1/2560 dividing unit
1/20
CP
dividing
1/256 dividing unit
unit
FS'
1/2FG
Speed monitor
1/2
&
dividing
reverse detection
unit
circuit
Schmidt
FG frequency
circuit
AMP
20
1
4
VDD
GND
TEST
VCO
Voltage control waveform
oscillator
APC
8bit D/A
convertor
AFC
Lock range
Timing dividing unit
detection
(12bit)
circuit
AFC
FG
8bit D/A
circuit
convertor
6
16
NC
NC
– 28 –
C
14
10 Vro
CP
8 APC
12 R/S
13 LD
9 AFC

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