Control Data Cyber 170 State Hardware Reference Manual page 50

Central Memory
Table 2-2. SECDED
Syndrome Codes/Corrected Bits
Code B i t Code Bit Code Bit code B i t Code Bit
20
66
@
40 6 5
@
60
@
8 0 6 6
0
21
@
4 1
@
6 1
@
8 1
@
22
@
42
@
62
@
8 2
@
23
@
43
@
63
@
8 3
@
24
0 4 4 0 6 4 0 8 4
@
25
@
45
@
65
@
85
@
26
@
46
@
66
@
8 6
@
27
@
67
@
67 30
0
87
@
28
@
68
@
68
@
8 8
@
29
@
19
@
69
@
89
@
2A
@
4A
@
6A
@
8A
@
2B
@
48
@
6B 22
@
8B
@
2C
0
4C
@
6C
@
8C
@
2D
@
4D
10
@
6D 1 4
@
8 0
@
2E 4 @ 48
@
6E
6 @
8E
@
2F
@
4F
@
6F
@
8F
@
30 2 / 3 0 50
@
70 56
0
90
@
31
@
51
@
71
@
9 1
@
32
@
52
@
72
@
92
@
33
@
53
@
73 60
0
9 3
@
30
@
54
@
74
@
94
@
35
@
55
@
75 58
9
9 5
@
36
@
56
@
76 62
@
96
@
37 28
0
57 26
@
77
@
97 25
0
38
@
58
@
78
@
98
@
39
@
59
@
79 57
@
99
@
3A
@
5A
@
7A 6 1
@
9A
@
3 8 20
@
5 8 1 8
@
78
@
9B 1 7
@
3C
0-
5 c
0
7C 5 9
0
9C
0
3D 12
@
5D 1 0
@
7D
@
9D 9
0
3 E 4 0
5E 2 0
7E
@
9E l @
3F
@
5F
@
7F 6 3
@
9F
@
Code B i t
A0
0
A l
0
A2
@
A 3
0
A4
0
A5
0
A6
0
A7 29
@
A8
0
A9
0
AA
0
AB 2 1
@
A C
0
AD 1 3
@
A E 5
@
AF
0
B O 48
@
B1
0
B2
@
8 3 52
@
B4
0
B5 50
@
B6 54
@
87
0
B8
0
B9 49
@
BA
53
@
BB
0
B C 51
@
B D
@
BE
@
BF
55
@
Code B i t
co
0 1 1
@
C l
0
C2
0
C3
0
c 4
0
C5
0
C6
0
C7 27
0
C 8
0
C9
0
C A
0
CB 19
@
C C
0
C D 1 1
0
C E 3
@
CF
0
D O 40
0
D l
0
D2
0
03 44
0
D l
0
05 42
0
D6 46
@
07
0
D8
0
D9 4 1 0
D A 4 5 @
D B
0
DC 43
0
D D
0
D E
0
DF 47
@
Code B i t
E O 3 2 0
E l
0
€2
0
E3 36
@
54
0
€ 5 34
@
E6
38
@
E7
0
E8
0
E9
3 3 Q
3 7 0
SB
@
EC J 5 @
ED
9
El7
@
EF
3u
@
FO
@
F1
a
F?
@
F3
@
F4
@
F 5
@
F6
@
F7 31
@
F8
@
F9
@
F A
@
FB 23
@
F C
@
FD 15
a
FE
7
@
FF
@
Notes:
@
Corrected single-bit error.
@
Syndrome code b i t f a i l e d ( s i n g l e code b i t s e t ) .
@
Double error or multiple error (even number of code b i t s s e t ) .
@
Multiple error reported as a s i n g l e error.
@
Double error or w l t i p l t error or forced double error due t o a p a r t i a l write parity error on one of the 2 b y t e s indicated.
@
No error detected.