Control Data Cyber 170 State Hardware Reference Manual page 42

Registers
RA C Register
The 21-bit CM reference address (RAC) register loads from CM during the second
word of a CYBER 170 exchange sequence. An
absolute CM address forms by adding
RAC to a relative address determined by the instruction. The content of the
P
register is added to RAC to form the program address in CM.
A P-equal-to-zero
condition specifies relative address 0 and, therefore, (RAC). This CM location
is reserved for recording error exit conditions and should not be used to store
data or instructions.
FLC Register
The 21-bit CM field length (FLC) register Loads from CM during the third word
of a CYBER 170 exchange sequence. The
FLC
register defines the size of the
field of the program in execution. Relative CM addresses are compared with FLC
to check that the program is not going out of its allocated memory range.
EM Register
The 6-bit exit mode (EM) register loads from CM during the fourth word of
a
CYBER 170 exchange sequence. The E M register holds six exit mode selection
bits that control individual. error conditions for
a
program.
Selected EM
register bits cause the CP to error exit when the corresponding conditions
occur. Any or all of the 6 bits can be set at one time. Clear EM register
bits allow the CP to continue without error processing when most of the
corresponding conditions occur. Refer to the error exit tables under Error
Response in chapter 5 for specific cases.
The exit mode selection bits appear
in the exchange package as bits
48
through 50 and bits 57
through 59. The mode
selection bits and their corresponding conditions are:
Bit Significance
48 Address out of range
49
Infinite operand
50 Indefinite operand
5 7
Hardware error
58
Hardware error
59
Hardware error