Control Data Cyber 170 State Hardware Reference Manual page 177

Instruction Execution
Timrng
Table 4-24. PP Instruction Timing (Continued)
Instruction Code Description
Execution Time
in 250-ns Cycles Timing Notes
Replace subtract one ( ( d l )
Load (m
+
(dl
Add (m
+
(dl)
Subtract (m
+
( d ) )
Logical difference(m
+
( d ) )
Store (m
+
( d ) )
Replace add (m
+
d ) )
Replace add one (m
+
(dl)
Replace subtract one (m
+
( d ) )
Central read from
(A)
to d
Central read (d) words from
(A)
to m
Central write to (A) from d
Central write (d) words to
(A)
from m
Jump to m if channel c active
Test and set channel c flag
Jump to m if channel c inactive
Clear channel c flag
Jump to m if channel c full
Timing Notes:
2. No
ADU
conflicts. No central memory conflicts. Add
a
possible trip due to
resynchronization (CM read instructions only).
3, Seven major cycles for instruction set-up and instruction exit. Five major cycles
for every CM word.
4. Six major cycles for instruction set-up and instruction exit. Five major cycles
for every CM word.
(Continued)
4-105