Control Data Cyber 170 State Hardware Reference Manual page 148

PP Logical instructions
Logical Difference
lld Logical difference d LMN d
This instruction forms the bit-by-bit logical difference of d and the lower 6
bits of
A
in the register in
A .
This is equivalent to complementing individual
bits of A that correspond to bits of d that are 1 . The upper 12 bits of A
are
not altered.
23dm Logical difference dm LMC dm
This instruction forms the bit-by-bit logical difference of the content of the
A register and the 18-bit quantity dm in A .
This is equivalent to complement-
ing individual bits of A which correspond to bits of dm that are 1 . The upper
6 bits of the quantity consist of d, and the lower
12 bits are the content of
the location (P
plus 11, which follows the present program address
( P ) .
33d Logical difference ( d )
This instruction forms in the A register the bit-by-bit logical difference of
the lower 12 bits of the A
register and the content at location d. This is
equivalent to complementing individual bits of
A
that correspond to bits in
location d that are 1's.
The upper 6 bits are not altered.