Control Data Cyber 170 State Hardware Reference Manual page 249

Index
A register 2-11,25
Access and cycle times 2-17
Activate instruction 4-97
Add instruction 4-72,73
Addition and subtraction 5-12
Address out of range error 2-12
Address registers, see A registers
Addressing section in CP 1-8
Addressing mode
Expanded 5-24
Standard 5-24
Addressing section 2-15
B register 2-11
Bank select 2-17
Barrel and
PP
reconfiguration example
(RPaO) 3-12
Barrel and
PP
reconfiguration example
(RP-2) 3-13
Barrel and slot 2-23
Barrel numbering table 3-9
Bit numbering 5
Block copy flag 2-13
Block copy from UEM
to CM instruction 4-16,17
Block copy instruction 2-7
Block copy instructions 2-13; 5-24
Block copy sequence 2-7
Boolean sequence
2-2
Bounds register 2-16,21
Branch instruction
2-8
Branch to K instruction 4-10,11,12,13,14
Cache memory 2-1 5
Cache Memory 1-8
Cathode ray tube, see CRT
CC634 system console 2-23
Central exchange jump instruction 2-8; 4-40
Central memory control, see CMC 1-8
Central memory, see CM
Central processor, see CP 1-3
Central read from instruction 4-89
Central read words from instruction 4-90
Central write to instruction 4-91
Central write words to instruction 4-92
Channel active/ inactive flag 5-3 1
Channel control flag 5-30
Channel, 110, see IOU
Channel, maintenance, see maintenance channel
Channel marker flag instructions 5-32
Channel operation
Channel active/inactive flag 5-31
Channel control flag 5-30
Channel marker flag instructions 5-32
Channel transfer timing 5-32
Error flag instructions 5-32
Register full/empty flag 5-31
Channel transfer timing 5-32
Character data word 5-41
Character mode 5-38
Characteristics
CM 1-4
CP 1-3
Functional 1-2
IOU 1-5
Physical 1-1
Chassis configuration
Dual CP 1-2
Single CP 1-2
Chip address 2-17
Chip select 2-17
CIO 1-11; 2-22,27
Clear channel flag instruction 4-94
CM 4-17
Access and cycle times 2-17
.
Address format 2-16
Address format ion 2-1 3
Addressing mode 5-24
Bank select 2-17
Block copy instructions 5-24
Bounds register 2-21
Characteristics 1-4
Chip address 2-17
Chip select 2-17
Column address select 2-17
Configuration switches 3-3
Direct readlwrite instructions 5-24
Extended, see UEM
Functional descriptions 2-16
Internal address assignments 5-58
Layout 2-21
Major system component descriptions 1-9