Digigram ALP-Dante User Manual page 37

User Manual for ALP-DANTE
Clocking considerations
AES67 mode on a Dante device enables both IEEE 1588 Precision Time Protocol
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(PTP) v1 and v2. A single clock domain must be created across both PTP v1 and v2
devices:
- Standard Dante devices support PTP v1 only
- AES67-enabled Dante devices support PTP v1 and PTP v2
- AES67 devices support PTP v2 only
PTP v1 and v2 are not inter-compatible. One AES67-enabled Dante device will act
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as the boundary clock between PTP v1 and v2, bridging the two clock domains
Enabling ALP-DANTE as Master for both Dante and AES67.
Enable the Dante card "Preferred Master" status
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Disable "Preferred Master" for all Dante devices that have AES67 disabled.
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Disable "Sync to External" for all devices.
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Assign a PTPv2 priority level of between 128 and 255 for all non-Dante devices
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If another AES67 device (Grandmaster Clock, or another AES67 device) is the Master ,
Make sure the PTP v2 Master has a priority of between 1 and 100, and is
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using the "Media Profile" clock settings.
Disable "Preferred Master" and "Sync To External" for all Dante devices.
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One AES67-enabled Dante device will automatically be selected as the
Boundary clock, becoming the Dante Master.
Make sure the Master Clock device is set to use the "Media profile" (not the
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"Default profile" because Dante devices do not support the Default profile.
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