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High-Risk Device, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from any use of a Cypress product as a Critical Component in a High-Risk Device.
This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required authorizations are first obtained. Contact support@cypress.com for details. The CYW9P62S1-43012EVB-01, as shipped from the factory, has been verified to meet with the requirements of CE as a Class A product.
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General Safety Instructions ESD Protection ESD can damage boards and associated components. Cypress recommends that you perform procedures only at an ESD workstation. If an ESD workstation is unavailable, use appropriate ESD protection by wearing an anti-static wrist strap attached to a grounded metal object.
You can use ModusToolbox™ to develop and debug your PSoC 6 MCU projects. ModusToolbox software is a set of tools that enable you to integrate Cypress devices into your existing development methodology. If you are new to PSoC 6 MCU and ModusToolbox IDE, refer to the application note...
Quick Start Guide ■ Figure 1-1. Kit Contents Inspect the contents of the kit; if you find any part missing, contact your nearest Cypress sales office for help: www.cypress.com/support. CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B Arrow.com.
These examples help you familiarize yourself with the PSoC 6 MCU and create your own design. These examples are available in various development ecosystems such as ModusToolbox IDE and Mbed OS. Visit Cypress’ code example page to access examples for the following development ecosystems: ModusToolbox based examples ❐...
Introduction Additional Learning Resources Cypress provides a wealth of data at www.cypress.com/psoc6 to help you to select the right PSoC device for your design and to help you to quickly and effectively integrate the device into your design. Technical Support...
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Introduction Table 1-2. Acronyms Used in this Document (continued) Acronym Definition Direct Memory Access External Crystal Oscillator Electrostatic Discharge GPIO General-Purpose Input/Output Human Interface Device Inter-Integrated Circuit Inter-IC Sound Integrated Circuit Integrated Development Environment Internet of Things Light-emitting Diode Low Power Oscillator Medium Access Control Out-of Box Personal Computer...
Kit Operation This chapter introduces you to various features of the PSoC 62S1 Wi-Fi BT Pioneer Board, including the theory of operation and the onboard KitProg3 programming and debugging functionality, USB-UART and USB-I2C bridges. Board Details The PSoC 62S1 Wi-Fi BT Pioneer Board is built around a PSoC 6 MCU. Figure 2-1 shows the block diagram of the PSoC 6 MCU device used on the board.
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Figure 2-2 shows the block diagram of the CYW9-BASE-01 Pioneer Board (modified for CYW9P62S1-43012EVB-01). Figure 2-3 shows the block diagram of the CYW9P62S1-43012CAR-01 Carrier Module. Figure 2-2. Block Diagram of Pioneer Board CYW9‐BASE‐01 Architecture Block Diagram Cypress Device 20‐pin ETM KitProg3 Mode 10‐pin SWD/ Reset Switch & LED JTAG Header...
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Kit Operation Table 2-1. PSoC 62S1 Wi-Fi BT Pioneer Board Pinout (continued) Primary On-board Secondary On-board Connection details Function Function Orange user LED GPIO on non-Arduino P1[5] – (LED8) header IO7 (J24.2) P5[0] UART_RX Arduino D0 (J4.1) Remove R21 to disconnect from KitProg3. P5[1] UART_TX Arduino D1 (J4.2)
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Kit Operation Table 2-1. PSoC 62S1 Wi-Fi BT Pioneer Board Pinout (continued) Primary On-board Secondary On-board Connection details Function Function Remove R24 to disconnect from CapSense. CapSense Button0 GPIO on non-Arduino P9[7] Populate R144 to connect to GPIO on non- header IO8 (J21.1) Arduino header.
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Kit Operation The CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit comes with the PSoC 62S1 Wi-Fi BT Pioneer Board. Figure 2-5 Figure 2-6 show the markup of the Pioneer Board. Figure 2-5. PSoC 62S1 Wi-Fi BT Pioneer Board - Top View 29 14 13 14 CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc.
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Kit Operation Figure 2-6. PSoC 62S1 Wi-Fi BT Pioneer Board - Bottom View The PSoC 62S1 Wi-Fi BT Pioneer Board has the following components: 1. Power LED (LED1): This Yellow LED indicates the status of power supplied to board. 2. KitProg3 USB connector (J6): The USB cable provided along with the PSoC 62S1 Wi-Fi BT Pioneer Board connects between this USB connector and the PC to use the KitProg3 onboard programmer and debugger and to provide power to the board.
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CYW43012 VDDIO power domain. 18. Cypress serial NOR flash memory (S25FS512S, U3): A S25FS512S NOR flash of 512-Mbit capacity is connected to the Quad SPI interface of the PSoC 6 MCU. The NOR device can be used for both data and code memory with execute-in-place (XIP) support and encryption.
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Kit Operation 22. Cypress Quad SPI Ferroelectric-RAM (CY15V104QSN, U4): The CY15V104QSN is a 4-Mbit nonvolatile memory employing an advanced ferroelectric process. F-RAM is nonvolatile and per- forms reads and writes similar to a RAM. It provides reliable data retention for 151 years and is connected to the Quad SPI interface of the PSoC 6 MCU.
The PSoC 62S1 Wi-Fi BT Pioneer Board can be programmed and debugged using the onboard KitProg3. KitProg3 is an onboard programmer/debugger with additional USB-UART and USB-I2C functionality. A Cypress PSoC 5LP device is used to implement the KitProg3. For more details on the KitProg3 functionality, see the KitProg3 User Guide.
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Kit Operation b. Select the CYW9P62S1-43012EVB-01 in the Choose Board Support Package (BSP) window and click Next, as shown in Figure 2-9. Figure 2-9. New Application Creation: Choose Board Support Package (BSP) c. Select the application in the Choose Starter Application window and click Next, as shown in Figure 2-10.
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Kit Operation 3. To build and program a PSoC 6 MCU application, in the Project Explorer, select <App_Name> project. In the Quick Panel, scroll to the Launches section and click the <App_Name> Program (KitProg3) configuration as shown in Figure 2-12. Figure 2-12.
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Kit Operation 2.2.1.1 Using the OOB Example – PSoC 6 MCU: Hello World The PSoC 62S1 Wi-Fi BT Pioneer Board is by default programmed with the code example: PSoC 6 MCU: Hello World. The steps below describe how to use the example. For a detailed description of the project refer to the example’s readme file in the GitHub repository.
Kit Operation 2.2.2 USB-UART Bridge The KitProg3 on the PSoC 62S1 Wi-Fi BT Pioneer Board can act as a USB-UART bridge. The KitProg 3 has two USB-UART bridges. The primary UART is connected to the PSoC 6 MCU and the secondary UART is connected to the CYW43012. The primary UART can always be accessed through USB, while the secondary UART can be accessed by changing the mode of the KitProg3 to BULK with two UARTs Mode.
Kit Operation 2.2.3 USB-I2C Bridge The KitProg3 can function as a USB-I2C bridge and can communicate with the Bridge Control Panel (BCP) software which acts as an I2C master. The I2C lines on the PSoC 6 MCU are hard-wired on the board to the I2C lines of the KitProg3, with onboard pull-up resistors as Figure 2-17 shows.
Hardware Schematics Refer to the schematic files available in the webpage. Hardware Functional Description This section explains in detail the individual hardware blocks. 3.2.1 CYW9P62S1-43012CAR-01 (MOD1) CYW9P62S1-43012CAR-01 PSoC 6 (1M) with CYW43012 USI SiP Carrier Module is a castellated PCB module which consists mainly of an USI SiP module, WM-BAC-CYW-50, with a PSoC 6 MCU and CYW43012.
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Hardware Carrier Module Footprint (Power) VDDA MOD1A VBAT VDDA_MCU VBAT_WL VBAT_WL VDDD VDDIO_WL VDDD_MCU VDDIO_WL VDDIO0_MCU VCCD_MCU VDDIO0 VDDIO1_MCU VDDIO1 *Note VDDIO2_MCU VDD_NS VDD_NS_MCU VBACKUP GND_1 GND_2 VBACKUP_MCU GND_3 GND_4 VDDUSB GND_5 GND_6 VDDUSB_MCU GND_7 Carrier Module Footprint Note: In WM-BAC-CYW-50, VDDIO0 & VDDIO1 need to be same v oltage as VDDIO_WL. VDDIO2_MCU w ill be same v oltage as VDDIO_WL as per baseboard design, the reason VDDIO0 &...
Hardware 3.2.2 PSoC 5LP-based KitProg3 (U2) An onboard PSoC 5LP (CY8C5868LTI-LP039) device is used as KitProg3 to program and debug PSoC 6 MCU. The PSoC 5LP device connects to the USB port of a PC through a USB connector and to the SWD and other communication interfaces of PSoC 6 MCU. The PSoC 5LP device is a true system-level solution providing MCU, memory, analog, and digital peripheral functions in a single chip.
Hardware 3.2.3 Serial Interconnection between PSoC 5LP and PSoC 6 MCU In addition to the use as an onboard programmer, the PSoC 5LP device functions as an interface for the USB-UART and USB-I2C bridges, as shown in Figure 3-3. The USB-Serial pins of the PSoC 5LP device are hard-wired to the I2C/UART pins of the PSoC 6 MCU.
Hardware 3.2.4 Serial Interconnection Between PSoC 5LP and CYW43012 The PSoC 5LP device also has a secondary UART that is connected to the BT_UART of the CYW43012 (USI WM-BAC-CYW-50). Figure 3-4. Serial Interconnection Between PSoC 5LP and CYW43012 KitProg3 Secondary UART Multiplexing KitProg3 Level Translator for Secondary UART and GPIO 0 OHM B_UART_2_TX...
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Hardware 3.2.5.1 Voltage regulators The power supply system is designed for the voltage configurations listed in Table 3-1. Some configurations achievable on this kit are outside the operating range for the device. However, it is not possible to achieve all applicable configurations by changing jumper positions but rather requires re- work of respective 0-ohm resistors.
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Hardware 3.2.5.2 Voltage Selection VCC_VBAT has a dedicated regulator that changes voltage by varying the feedback voltage through the resistor network at J9. VTARG and VCC_VDDIO2_IN have dedicated 3-pin voltage selection headers J14 and J16 respectively that select between VCC_3V3 or VCC_1V8 voltages. Figure 3-7 shows the schematics of the power selection circuits.
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Hardware 3.2.5.3 Current Measurement Headers The current of the following domains have dedicated 2-pin headers to facilitate easy current mea- surement using an ammeter across the pins. Note: If Header is not loaded by default, it is by-passed by a 0-ohm resistor parallel to it. Please make sure to remove the corresponding 0-ohm resistor (as per Figure 3-9) before measuring current...
Hardware 3.2.6 I/O Headers 3.2.6.1 Arduino-compatible Headers (J1, J2, J3, J4) The board has four Arduino-compatible headers: J1, J2, J3, and J4. You can connect 3.3 V Arduino- compatible shields to develop applications based on the shield’s hardware. Note: 5-V shields are not supported and connecting a 5-V shield may permanently damage the board.
Hardware 3.2.7 CapSense Circuit A CapSense slider and two buttons, all supporting both self-capacitance (CSD) and mutual- capacitance (CSX) sensing are connected to PSoC 6 MCU as Figure 3-11 shows. Three external capacitors - CMOD for CSD, CINTA and CINTB for CSX - are present on the CYW9P62S1- 43012CAR-01.
Hardware 3.2.8 LEDs LED2 (Yellow) indicates the status of KitProg3 (See the KitProg3 User Guide for details). LED1 (Yellow) indicates the status of the power supplied to the board. The board also has two user-controllable LEDs (LED8 and LED9) connected to PSoC 6 MCU pins for user applications.
3.2.10 Cypress Quad SPI NOR Flash The PSoC 62S1 Wi-Fi BT Pioneer Board has a Cypress NOR flash memory (S25FS512SAGM- FI010) of 512Mb capacity. The NOR flash is connected to the Quad SPI interface of the PSoC 6 MCU device. The NOR flash device can be used for both data and code with execute-in-place (XIP) support and encryption.
Hardware 3.2.11 Cypress Quad SPI F-RAM The PSoC 62S1 Wi-Fi BT Pioneer Board contains the CY15V104QSN Excelon™ F-RAM device, which can be accessed through Quad SPI interface. The F-RAM is 4-Mbit (512K × 8) and is capable of Quad SPI speed up to 108 MHz but on this kit it is limited to 75 MHz.
Hardware PSoC 62S1 Wi-Fi BT Pioneer Kit Rework 3.3.1 U.FL (UMCC) Connector for External Antenna The RF output of CYW43012 is connected to the chip antenna by default. To disconnect the chip antenna and connect an external antenna, remove C13 and populate C11, J1 on CYW9P62S1- 43012CAR-01.
Hardware Frequently Asked Questions 1. How does CYW9P62S1-43012EVB-01 handle a voltage connection when multiple power sources are plugged in? There are three different options to power the baseboard; KitProg3 Micro-B USB connector (J6), PSoC 6 Micro-B USB connector (J7), and External DC supply via VIN connector (J5). The voltage from each of the sources in passed through ORing diodes that supply VCC_IN.
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