Clk Jumper Options; External Reference Jumper Options - Texas Instruments ADS131E08 User Manual

Hide thumbs Also See for ADS131E08:
Table of Contents

Advertisement

www.ti.com
3.2
Clock
The ADS131E08 has an on-chip oscillator circuit that generates a 2.048-MHz clock (nominal). This clock
can vary by ±5% over temperature. For applications that require higher accuracy, the ADS131E08 can
also accept an external clock signal. The ADS131E08 provides an option to test both internal and external
clock configurations. It also provides an option to generate the external clock from either the onboard
oscillator or from an external clock source.
The onboard oscillator is powered by the DVDD supply of the ADS131E08. Care must be taken to ensure
that the external oscillator can operate either with +1.8 V or +3.3 V, depending on the DVDD supply
configuration.
Table 5
ADS131E08 Clock
JP5
JP6
J4 - pin 10
A 2.048-MHz oscillator available for the +3.3-V DVDD supply is the FXO-HC735-2.048MHz. For a +1.8-V
DVDD supply, use the SiT8002AC-34-18E-2.048. The EVM is shipped with the external oscillator enabled.
3.3
Reference
The ADS131E08 has an on-chip internal reference circuit that provides reference voltages to the device.
Alternatively, the internal reference can be powered down and VREFP can be applied externally. This
configuration is achieved with the external reference generators (U2 and U3) and driver buffer. These
components (U2, U3, and U4) must be installed by the user; they are not installed at the factory. The
external reference voltage can be set to either 4.096 V or 2.5 V, depending on the analog supply voltage.
Measure TP3 to make sure the external reference is correct and stable. The settings for the external
reference is described in
low-noise amplifier like the
ADS131E08 Reference
JP12
JP2
3.3.1
Accessing ADS131E08 Analog Supplies
Some ADS131E08 output signals are provided as test points for probing purposes using J4 (not installed
on the board).
Table 7
Signal
Not connected
Not connected
PWDN
Dasiy in
AGND
SBAU200B – June 2012 – Revised February 2016
Submit Documentation Feedback
shows the jumper settings for the three options for the ADS131E08 clocks.
Table 5. CLK Jumper Options
Internal Clock
Not installed
Don't care
Don't care
Table
6. This table assumes
OPA350
can be installed at U4.
Table 6. External Reference Jumper Options
Internal Reference
VREF = 2.5 V
Don't care
Not installed
lists the various test signals with the corresponding test points.
Table 7. Auxiliary Connector Test Signals and Test Points
J4 Pin Number
1
3
5
7
9
Copyright © 2012–2016, Texas Instruments Incorporated
ADS131E08EVM Daughter-Card Hardware Overview
External OSC Clock
2-3
1-2 (disable)
Don't care
REF5025
is installed at U2 and
External Reference
VREF = 4.096 V
2-3
Installed
2
4
6
8
10
Performance Demonstration Kit for the ADS131E08
External Clock
1-2
Don't care
Clock source
REF5040
at U3. A
VREF = 2.5 V
1-2
Installed
Signal
GPIO1
GPIO2
GPIO3
GPIO4
Not connected
13

Advertisement

Table of Contents
loading

This manual is also suitable for:

Ads131e08evm-pdk

Table of Contents