Infineon AIROC CYW43012 Manual page 34

Low-power system design wi-fi & bluetooth combo chip and psoc 6 mcu
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Low-power system design with AIROC™ Wi-Fi & Bluetooth® combo
chip and PSoC™ 6 MCU
Low power assistant (LPA)
Parameter
Packet filters
6. Disable peripherals such as CAPSENSE™, Serial Communication Block (SCB), and quad serial memory
interface in PSoC™ 6 MCU if they are enabled but not used in the example.
1
Figure 16
Disable peripherals in design.modus
7. Review the system clock settings and disable unused clock paths and PLLs. For example, in the CY8CKIT-
062S2-43012 design.modus, PLL1 can be disabled if USB is not used. To save further power, PLL0 can be
disabled and FLL can be routed to CLK_HF0 (CPU clocks):
Application note
Configuration
Enable the Add Minimal
Set of Keep Filters
option
Enable MQTT TLS filter
Enable MQTT filter
Other configuration -
Action: Keep
Protocol: TCP
Direction: Source Port
2
3
Comment
Ensures that the device can connect to a Wi-Fi AP and
obtain an IP address
Ensures that all MQTT packets reach the host. After
connection to the AP, the host receives only the MQTT
packets.
34
002-27910 Rev. *C
2023-05-29

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